From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Thu, 29 Mar 2018 13:52:10 +0300
Subject: [U-Boot] [PATCH] timer: Add High Precision Event Timers (HPET)
	support
In-Reply-To: <20180329005844.GA63828@intel.com>
References: <20180329005844.GA63828@intel.com>
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To: u-boot@lists.denx.de

On Wed, 2018-03-28 at 17:58 -0700, Ivan Gorinov wrote:
> Adding HPET as an alternative timer for x86 (default is TSC).
> HPET main counter has constant clock frequency, calibration is not
> required.
> This change also makes TSC timer driver optional on x86 platforms.
> If X86_TSC is disabled, early timer functions are provided by HPET.
> 
> HPET can be selected as the tick timer in the Device Tree "chosen"
> node:
> 
>   /include/ "hpet.dtsi"
> 
>   chosen {
>     tick-timer = "/hpet0";
>   };
> 


First question is how this will work in case of Broadwell and Ivybridge
that have something to do with HPET in their CPU code, i.e.

arch/x86/cpu/broadwell/pch.c
arch/x86/cpu/ivybridge/lpc.c

?

Look for

    clrsetbits_le32(RCB_REG(HPTC), 3, 1 << 7);

> +static int hpet_timer_get_count(struct udevice *dev, u64 *count)

> +static int hpet_timer_probe(struct udevice *dev)

> +#ifndef CONFIG_X86_TSC_TIMER

> +#define EARLY_HPET_BASE 0xfed00000

HPET address is fixed, AFAIU, on x86, and provided by config option in
U-Boot.

> +unsigned long notrace timer_early_get_rate(void)

> +u64 notrace timer_early_get_count(void)

> +int timer_init(void)

These functions have too much code duplication with above.

> +#endif

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy