[U-Boot] [PATCH v4] timer: Add High Precision Event Timers (HPET) support

[Andy Shevchenko <andriy.shevchenko@linux.intel.com>]

On Fri, 2018-04-06 at 10:38 -0700, Ivan Gorinov wrote:
> Add HPET driver as an alternative timer for x86 (default is TSC).
> HPET counter has constant frequency and does not need calibration.
> This change also makes TSC timer driver optional on x86.
> New HPET driver can also be selected as the early timer on x86.

> +/* Reset and start the main counter. */
> +static void start_main_counter(void *regs)
> +{
> +	volatile u64 *main_counter = regs + HPET_MAIN_COUNT;
> +	u32 config;
> +
> +	config = readl(regs + HPET_CONFIG_REG);
> +	config &= ~ENABLE_CNF;
> +	writel(config, regs + HPET_CONFIG_REG);

> +	*main_counter = 0;

It needs to be done as writeq() / readq().

Please, define them first in arch/x86/include/asm/io.h
(as an example you can use arch/arm/include/asm/io.h).

> +	config |= ENABLE_CNF;
> +	writel(config, regs + HPET_CONFIG_REG);
> +}
> +
> +/* Read the main counter, repeat if 32-bit rollover happens. */
> +static u64 read_main_counter(void *regs)
> +{
> +	volatile u64 *main_counter = regs + HPET_MAIN_COUNT;
> +	u64 t, t0;
> +
> +	t = *main_counter;
> +	do {
> +		t0 = t;

> +		t = *main_counter;

Ditto.

> +	} while ((t >> 32) != (t0 >> 32));
> +
> +	return t;
> +}

-- 
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy