From mboxrd@z Thu Jan  1 00:00:00 1970
From: See, Chin Liang <chin.liang.see@intel.com>
Date: Thu, 19 Apr 2018 05:15:09 +0000
Subject: [U-Boot] [PATCH v1 05/16] arm: socfpga: misc: Add
 CONFIG_SYS_L2_PL310 switch
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On Thu, 2018-04-19 at 04:47 +0200, Marek Vasut wrote:
> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
> > 
> > Add CONFIG_SYS_L2_PL310 conditional build.
> Why ?
> 

In ARM64, L2 cache controller is accessed through processor registers.
Hence we shall make this conditional in order this file can be shared
across SOCFPGAs.

Thanks
Chin Liang