[U-Boot] [PATCH v1 05/16] arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch

Marek Vasut
2018-04-20T11:00:49Z

On 04/20/2018 09:49 AM, Ley Foon Tan wrote:
> On Thu, Apr 19, 2018 at 4:19 PM, Marek Vasut <marex@denx.de> wrote:
>> On 04/19/2018 07:15 AM, See, Chin Liang wrote:
>>> On Thu, 2018-04-19 at 04:47 +0200, Marek Vasut wrote:
>>>> On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
>>>>>
>>>>> Add CONFIG_SYS_L2_PL310 conditional build.
>>>> Why ?
>>>>
>>>
>>> In ARM64, L2 cache controller is accessed through processor registers.
>>> Hence we shall make this conditional in order this file can be shared
>>> across SOCFPGAs.
>>
>> That should be in the patch description .
>> Do you ever add the PL310 register access on S10 later in the set?
>>
>> --
> Okay, will update description.
> No, S10 doesn't use PL310 registers.

If this PL310 is Gen5 specific, then keep it in some Gen5 file.

--
Best regards,
Marek Vasut