From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v6 1/2] x86: Add TSC-specific timer functions
Date: Mon, 23 Apr 2018 11:22:44 +0300 [thread overview]
Message-ID: <1524471764.21176.483.camel@linux.intel.com> (raw)
In-Reply-To: <20180420180047.GB2940@intel.com>
On Fri, 2018-04-20 at 11:00 -0700, Ivan Gorinov wrote:
> On Fri, Apr 20, 2018 at 06:25:08AM -0600, Andy Shevchenko wrote:
> > > - while (rdtsc() < final_tsc)
> > > - ;
> > > + while (rdtsc() - start_tsc < ticks);
> >
> > I would rather preserve existing style.
>
> OK. Existing style does not correctly handle overflow,
> but for a 64-bit counter it's a very unlikely event.
You didn't get me. I'm just talking about style, not about
functionality.
See above for lines I left in this reply.
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
next prev parent reply other threads:[~2018-04-23 8:22 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-12 22:11 [U-Boot] [PATCH v6 0/2] timer: Add High Precision Event Timers (HPET) support Ivan Gorinov
2018-04-12 22:12 ` [U-Boot] [PATCH v6 1/2] x86: Add TSC-specific timer functions Ivan Gorinov
2018-04-20 12:25 ` Andy Shevchenko
2018-04-20 18:00 ` Ivan Gorinov
2018-04-23 8:22 ` Andy Shevchenko [this message]
2018-04-23 7:38 ` Bin Meng
2018-04-23 7:53 ` Bin Meng
2018-04-23 23:56 ` Ivan Gorinov
2018-04-24 8:41 ` Bin Meng
2018-04-26 3:42 ` Bin Meng
2018-04-30 23:13 ` Simon Glass
2018-04-12 22:12 ` [U-Boot] [PATCH v6 2/2] timer: Add High Precision Event Timers (HPET) support Ivan Gorinov
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