From: Ang, Chee Hong <chee.hong.ang@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v1 2/3] arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
Date: Thu, 26 Apr 2018 06:15:48 +0000 [thread overview]
Message-ID: <1524723348.29684.25.camel@intel.com> (raw)
In-Reply-To: <0e596f76-9ccd-d5ed-9eaa-5d90b9f8376a@denx.de>
On Fri, 2018-04-20 at 05:42 +0200, Marek Vasut wrote:
> On 04/20/2018 05:26 AM, chee.hong.ang at intel.com wrote:
> >
> > From: Chee Hong Ang <chee.hong.ang@intel.com>
> >
> > Enable 'fpga' command in u-boot. User will be able to use the
> > fpga command to program the FPGA on Stratix10 SoC.
> >
> > Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
> > ---
> > arch/arm/mach-socfpga/misc.c | 20 +++++++++++++++++---
> > arch/arm/mach-socfpga/misc_s10.c | 4 ++++
> > drivers/fpga/altera.c | 6 ++++++
> > include/altera.h | 8 ++++++++
> > 4 files changed, 35 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-
> > socfpga/misc.c
> > index d15cbc7..e36c686 100644
> > --- a/arch/arm/mach-socfpga/misc.c
> > +++ b/arch/arm/mach-socfpga/misc.c
> > @@ -87,11 +87,24 @@ int overwrite_console(void)
> > #endif
> >
> > #ifdef CONFIG_FPGA
> > -/*
> > - * FPGA programming support for SoC FPGA Cyclone V
> > - */
> > static Altera_desc altera_fpga[] = {
> > {
> > +#ifdef CONFIG_FPGA_STRATIX10
> Create a separate structure for each FPGA family.
Will be addressed in v2 patch.
>
> >
> > + /* FPGA programming support for SoC FPGA Stratix
> > 10 */
> > + /* Family */
> > + Intel_FPGA_Stratix10,
> > + /* Interface type */
> > + secure_device_manager_mailbox,
> > + /* No limitation as additional data will be
> > ignored */
> > + -1,
> > + /* No device function table */
> > + NULL,
> > + /* Base interface address specified in driver */
> > + NULL,
> > + /* No cookie implementation */
> > + 0
> > +#else
> > + /* FPGA programming support for SoC FPGA Cyclone V
> > */
> > /* Family */
> > Altera_SoCFPGA,
> > /* Interface type */
> > @@ -104,6 +117,7 @@ static Altera_desc altera_fpga[] = {
> > NULL,
> > /* No cookie implementation */
> > 0
> > +#endif
> > },
> > };
> >
> > diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-
> > socfpga/misc_s10.c
> > index b1cc6ca..012d8f6 100644
> > --- a/arch/arm/mach-socfpga/misc_s10.c
> > +++ b/arch/arm/mach-socfpga/misc_s10.c
> > @@ -71,6 +71,10 @@ int arch_misc_init(void)
> >
> > int arch_early_init_r(void)
> > {
> > +#ifdef CONFIG_FPGA
> > + socfpga_fpga_add();
> > +#endif
> > +
> > return 0;
> > }
> >
> > diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
> > index 135a357..b662ff5 100644
> > --- a/drivers/fpga/altera.c
> > +++ b/drivers/fpga/altera.c
> > @@ -40,6 +40,9 @@ static const struct altera_fpga {
> > #if defined(CONFIG_FPGA_STRATIX_V)
> > { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL
> > },
> > #endif
> > +#if defined(CONFIG_FPGA_STRATIX10)
> > + { Intel_FPGA_Stratix10, "Stratix10", stratix10_load, NULL,
> > NULL },
> > +#endif
> > #if defined(CONFIG_FPGA_SOCFPGA)
> > { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL },
> > #endif
> > @@ -155,6 +158,9 @@ int altera_info(Altera_desc *desc)
> > case fast_passive_parallel_security:
> > printf("Fast Passive Parallel with Security
> > (FPPS)\n");
> > break;
> > + case secure_device_manager_mailbox:
> > + puts("Secure Device Manager (SDM) Mailbox\n");
> > + break;
> > /* Add new interface types here */
> > default:
> > printf("Unsupported interface type, %d\n", desc-
> > >iface);
> > diff --git a/include/altera.h b/include/altera.h
> > index 48d3eb7..e9ba47a 100644
> > --- a/include/altera.h
> > +++ b/include/altera.h
> > @@ -40,6 +40,8 @@ enum altera_iface {
> > fast_passive_parallel,
> > /* fast passive parallel with security (FPPS) */
> > fast_passive_parallel_security,
> > + /* secure device manager (SDM) mailbox */
> > + secure_device_manager_mailbox,
> > /* insert all new types before this */
> > max_altera_iface_type,
> > };
> > @@ -55,6 +57,8 @@ enum altera_family {
> > Altera_StratixII,
> > /* StratixV Family */
> > Altera_StratixV,
> > + /* Stratix10 Family */
> > + Intel_FPGA_Stratix10,
> > /* SoCFPGA Family */
> > Altera_SoCFPGA,
> >
> > @@ -117,4 +121,8 @@ int socfpga_load(Altera_desc *desc, const void
> > *rbf_data, size_t rbf_size);
> > int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t
> > rbf_size);
> > #endif
> >
> > +#ifdef CONFIG_FPGA_STRATIX10
> > +int stratix10_load(Altera_desc *desc, const void *rbf_data, size_t
> > rbf_size);
> What is this doing here ?
When user issue 'fpga load' command at uboot command prompt to do FPGA
programming, this call back function will be invoked.
>
> >
> > +#endif
> > +
> > #endif /* _ALTERA_H_ */
> >
>
next prev parent reply other threads:[~2018-04-26 6:15 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-20 3:26 [U-Boot] [PATCH v1 0/3] Stratix10 FPGA reconfiguration support chee.hong.ang at intel.com
2018-04-20 3:26 ` [U-Boot] [PATCH v1 1/3] arm: socfpga: stratix10: Add Stratix10 FPGA Reconfiguration Driver chee.hong.ang at intel.com
2018-04-20 3:41 ` Marek Vasut
2018-04-26 6:12 ` Ang, Chee Hong
2018-04-26 12:37 ` Marek Vasut
2018-04-27 5:51 ` Ang, Chee Hong
2018-04-27 7:08 ` Marek Vasut
2018-04-27 9:10 ` Ang, Chee Hong
2018-04-20 3:26 ` [U-Boot] [PATCH v1 2/3] arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table chee.hong.ang at intel.com
2018-04-20 3:42 ` Marek Vasut
2018-04-26 6:15 ` Ang, Chee Hong [this message]
2018-04-26 12:38 ` Marek Vasut
2018-04-27 5:31 ` Ang, Chee Hong
2018-04-27 7:08 ` Marek Vasut
2018-04-27 8:03 ` Ang, Chee Hong
2018-04-20 3:26 ` [U-Boot] [PATCH v1 3/3] arm: socfpga: stratix10: Enable Stratix10 FPGA Reconfiguration chee.hong.ang at intel.com
2018-04-20 3:43 ` Marek Vasut
2018-04-26 6:16 ` Ang, Chee Hong
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