* [U-Boot] [PATCH 0/2] Add MDIO driver model support
@ 2018-06-06 7:56 make at marvell.com
2018-06-06 7:56 ` [U-Boot] [PATCH 1/2] dm: mdio: add a uclass for MDIO make at marvell.com
2018-06-06 7:56 ` [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver make at marvell.com
0 siblings, 2 replies; 5+ messages in thread
From: make at marvell.com @ 2018-06-06 7:56 UTC (permalink / raw)
To: u-boot
From: Ken Ma <make@marvell.com>
Ken Ma (2):
dm: mdio: add a uclass for MDIO
mdio: add marvell MDIO driver
MAINTAINERS | 2 +
arch/arm/Kconfig | 1 +
doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++
doc/device-tree-bindings/mdio/mdio-bus.txt | 54 ++++++
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/mdio/Kconfig | 28 +++
drivers/mdio/Makefile | 7 +
drivers/mdio/mdio-uclass.c | 119 +++++++++++++
drivers/mdio/mvmdio.c | 237 +++++++++++++++++++++++++
include/dm/uclass-id.h | 1 +
include/mdio.h | 62 +++++++
12 files changed, 532 insertions(+)
create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt
create mode 100644 doc/device-tree-bindings/mdio/mdio-bus.txt
create mode 100644 drivers/mdio/Kconfig
create mode 100644 drivers/mdio/Makefile
create mode 100644 drivers/mdio/mdio-uclass.c
create mode 100644 drivers/mdio/mvmdio.c
create mode 100644 include/mdio.h
--
1.9.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 1/2] dm: mdio: add a uclass for MDIO
2018-06-06 7:56 [U-Boot] [PATCH 0/2] Add MDIO driver model support make at marvell.com
@ 2018-06-06 7:56 ` make at marvell.com
2018-06-06 7:56 ` [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver make at marvell.com
1 sibling, 0 replies; 5+ messages in thread
From: make at marvell.com @ 2018-06-06 7:56 UTC (permalink / raw)
To: u-boot
From: Ken Ma <make@marvell.com>
Add a uclass which provides access to MDIO busses and includes
operations required by MDIO.
The implementation is based on the existing mii/phy/mdio data
structures and APIs.
This patch also adds evice tree binding for MDIO bus.
Signed-off-by: Ken Ma <make@marvell.com>
---
MAINTAINERS | 1 +
doc/device-tree-bindings/mdio/mdio-bus.txt | 54 +++++++++++++
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/mdio/Kconfig | 18 +++++
drivers/mdio/Makefile | 6 ++
drivers/mdio/mdio-uclass.c | 119 +++++++++++++++++++++++++++++
include/dm/uclass-id.h | 1 +
include/mdio.h | 62 +++++++++++++++
9 files changed, 264 insertions(+)
create mode 100644 doc/device-tree-bindings/mdio/mdio-bus.txt
create mode 100644 drivers/mdio/Kconfig
create mode 100644 drivers/mdio/Makefile
create mode 100644 drivers/mdio/mdio-uclass.c
create mode 100644 include/mdio.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 642c448..f66a904 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -335,6 +335,7 @@ M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git git://git.denx.de/u-boot-dm.git
F: drivers/core/
+F: drivers/mdio/
F: include/dm/
F: test/dm/
diff --git a/doc/device-tree-bindings/mdio/mdio-bus.txt b/doc/device-tree-bindings/mdio/mdio-bus.txt
new file mode 100644
index 0000000..68d8b25
--- /dev/null
+++ b/doc/device-tree-bindings/mdio/mdio-bus.txt
@@ -0,0 +1,54 @@
+MDIO (Management Data Input/Output) busses
+
+MDIO busses can be described with a node for the MDIO master device
+and a set of child nodes for each phy on the bus.
+
+The MDIO node requires the following properties:
+- #address-cells - number of cells required to define phy address on
+ the MDIO bus.
+- #size-cells - should be zero.
+- compatible - name of MDIO bus controller following generic names
+ recommended practice.
+- reg - address and length of the MDIO register.
+
+Optional property:
+- mdio-name - MDIO bus name
+
+The child nodes of the MDIO driver are the individual PHY devices
+connected to this MDIO bus. They must have a "reg" property given the
+PHY address on the MDIO bus.
+- reg - (required) phy address in MDIO bus.
+
+Example for cp110 MDIO node at the SoC level:
+ cp0_mdio: mdio at 12a200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,orion-mdio";
+ reg = <0x12a200 0x10>;
+ mdio-name = "cp0-mdio";
+ };
+
+ cp0_xmdio: mdio at 12a600 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,xmdio";
+ reg = <0x12a600 0x200>;
+ mdio-name = "cp0-xmdio";
+ };
+
+And at the board level, example for armada-8040-mcbin board:
+ &cp0_mdio {
+ ge_phy: ethernet-phy at 0 {
+ reg = <0>;
+ };
+ };
+
+ &cp0_xmdio {
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ };
+
+ phy8: ethernet-phy at 8 {
+ reg = <8>;
+ };
+ };
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 9e21b28..3fc0a90 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -44,6 +44,8 @@ source "drivers/led/Kconfig"
source "drivers/mailbox/Kconfig"
+source "drivers/mdio/Kconfig"
+
source "drivers/memory/Kconfig"
source "drivers/misc/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index a213ea9..041a7bf 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -82,6 +82,7 @@ obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += phy/allwinner/
obj-y += phy/marvell/
+obj-y += mdio/
obj-y += rtc/
obj-y += scsi/
obj-y += sound/
diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig
new file mode 100644
index 0000000..76e3758
--- /dev/null
+++ b/drivers/mdio/Kconfig
@@ -0,0 +1,18 @@
+#
+# MDIO infrastructure and drivers
+#
+
+menu "MDIO Support"
+
+config DM_MDIO
+ bool "Enable Driver Model for MDIO drivers"
+ depends on DM
+ help
+ Enable driver model for MDIO access.
+ Drivers provide methods to management data
+ Input/Output.
+ MDIO uclass provides interfaces to get mdio
+ udevice or mii bus from its child phy node or
+ an ethernet udevice which the phy belongs to.
+
+endmenu
diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile
new file mode 100644
index 0000000..9b290c0
--- /dev/null
+++ b/drivers/mdio/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018 Marvell International Ltd.
+# Author: Ken Ma<make@marvell.com>
+
+obj-$(CONFIG_DM_MDIO) += mdio-uclass.o
diff --git a/drivers/mdio/mdio-uclass.c b/drivers/mdio/mdio-uclass.c
new file mode 100644
index 0000000..251776b
--- /dev/null
+++ b/drivers/mdio/mdio-uclass.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ * Author: Ken Ma<make@marvell.com>
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <dm/uclass-internal.h>
+#include <miiphy.h>
+#include <mdio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mdio_mii_bus_get(struct udevice *mdio_dev, struct mii_dev **bus)
+{
+ *bus = *(struct mii_dev **)dev_get_uclass_platdata(mdio_dev);
+
+ return 0;
+}
+
+int mdio_device_get_from_phy(int phy_node, struct udevice **devp)
+{
+ int mdio_off;
+
+ mdio_off = fdt_parent_offset(gd->fdt_blob, phy_node);
+ return uclass_get_device_by_of_offset(UCLASS_MDIO, mdio_off,
+ devp);
+}
+
+int mdio_mii_bus_get_from_phy(int phy_node, struct mii_dev **bus)
+{
+ struct udevice *mdio_dev;
+ int ret;
+
+ ret = mdio_device_get_from_phy(phy_node, &mdio_dev);
+ if (ret)
+ return ret;
+
+ *bus = *(struct mii_dev **)dev_get_uclass_platdata(mdio_dev);
+
+ return 0;
+}
+
+int mdio_device_get_from_eth(struct udevice *eth, struct udevice **devp)
+{
+ int dev_node = dev_of_offset(eth);
+ int phy_node;
+
+ phy_node = fdtdec_lookup_phandle(gd->fdt_blob, dev_node, "phy");
+ if (phy_node > 0)
+ return mdio_device_get_from_phy(phy_node, devp);
+
+ /*
+ * If there is no phy reference under the ethernet fdt node,
+ * it is not an error since the ethernet device may do not use
+ * mode; so in this case, the output mdio device pointer is set
+ * as NULL.
+ */
+ *devp = NULL;
+ return 0;
+}
+
+int mdio_mii_bus_get_from_eth(struct udevice *eth, struct mii_dev **bus)
+{
+ struct udevice *mdio_dev;
+ int ret;
+
+ ret = mdio_device_get_from_eth(eth, &mdio_dev);
+ if (ret)
+ return ret;
+
+ if (mdio_dev)
+ *bus = *(struct mii_dev **)dev_get_uclass_platdata(mdio_dev);
+ else
+ *bus = NULL;
+
+ return 0;
+}
+
+static int mdio_uclass_pre_probe(struct udevice *dev)
+{
+ struct mii_dev **pbus = dev_get_uclass_platdata(dev);
+ struct mii_dev *bus;
+ const char *name;
+
+ bus = mdio_alloc();
+ if (!bus) {
+ printf("Failed to allocate MDIO bus @%p\n",
+ devfdt_get_addr_ptr(dev));
+ return -1;
+ }
+
+ name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
+ "mdio-name", NULL);
+ if (name)
+ strncpy(bus->name, name, MDIO_NAME_LEN);
+ *pbus = bus;
+
+ return 0;
+}
+
+static int mdio_uclass_post_probe(struct udevice *dev)
+{
+ struct mii_dev **pbus = dev_get_uclass_platdata(dev);
+
+ return mdio_register(*pbus);
+}
+
+UCLASS_DRIVER(mdio) = {
+ .id = UCLASS_MDIO,
+ .name = "mdio",
+ .pre_probe = mdio_uclass_pre_probe,
+ .post_probe = mdio_uclass_post_probe,
+ .per_device_platdata_auto_alloc_size = sizeof(struct mii_dev *),
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index d7f9df3..170a0cc 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -49,6 +49,7 @@ enum uclass_id {
UCLASS_LPC, /* x86 'low pin count' interface */
UCLASS_MAILBOX, /* Mailbox controller */
UCLASS_MASS_STORAGE, /* Mass storage device */
+ UCLASS_MDIO, /* MDIO device */
UCLASS_MISC, /* Miscellaneous device */
UCLASS_MMC, /* SD / MMC card or chip */
UCLASS_MOD_EXP, /* RSA Mod Exp device */
diff --git a/include/mdio.h b/include/mdio.h
new file mode 100644
index 0000000..50458b1
--- /dev/null
+++ b/include/mdio.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ * Author: Ken Ma<make@marvell.com>
+ */
+
+#ifndef _MDIO_H_
+#define _MDIO_H_
+
+#include <dm.h> /* Because we dereference struct udevice here */
+#include <phy.h>
+
+/**
+ * mdio_mii_bus_get() - Get mii bus from mdio udevice
+ *
+ * @mdio_dev: mdio udevice
+ * @bus: mii bus
+ * @returns 0 on success, error code otherwise.
+ */
+int mdio_mii_bus_get(struct udevice *mdio_dev, struct mii_dev **bus);
+
+/**
+ * mdio_device_get_from_phy() - Get the mdio udevice which the phy belongs to
+ *
+ * @phy_node: phy node offset
+ * @devp: mdio udevice
+ * @returns 0 on success, error code otherwise.
+ */
+int mdio_device_get_from_phy(int phy_node, struct udevice **devp);
+
+/**
+ * mdio_mii_bus_get_from_phy() - Get the mii bus which the phy belongs to
+ *
+ * @phy_node: phy node offset
+ * @bus: mii bus
+ * @returns 0 on success, error code otherwise.
+ */
+int mdio_mii_bus_get_from_phy(int phy_node, struct mii_dev **bus);
+
+/**
+ * mdio_device_get_from_eth() - When there is a phy reference of "phy = <&...>"
+ * under an ethernet udevice fdt node, this function can
+ * get the mdio udevice which the phy belongs to
+ *
+ * @dev: the ethernet udevice which contains the phy reference
+ * @devp: mdio udevice
+ * @returns 0 on success, error code otherwise.
+ */
+int mdio_device_get_from_eth(struct udevice *eth, struct udevice **devp);
+
+/**
+ * mdio_mii_bus_get_from_eth() - When there is a phy reference of
+ * "phy = <&...>" under an ethernet udevice fdt node, this
+ * function can get the mii bus which the phy belongs to
+ *
+ * @eth: the ethernet udevice which contains the phy reference
+ * @bus: mii bus
+ * @returns 0 on success, error code otherwise.
+ */
+int mdio_mii_bus_get_from_eth(struct udevice *eth, struct mii_dev **bus);
+
+#endif /* _MDIO_H_ */
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver
2018-06-06 7:56 [U-Boot] [PATCH 0/2] Add MDIO driver model support make at marvell.com
2018-06-06 7:56 ` [U-Boot] [PATCH 1/2] dm: mdio: add a uclass for MDIO make at marvell.com
@ 2018-06-06 7:56 ` make at marvell.com
2018-06-06 8:52 ` Chris Packham
1 sibling, 1 reply; 5+ messages in thread
From: make at marvell.com @ 2018-06-06 7:56 UTC (permalink / raw)
To: u-boot
From: Ken Ma <make@marvell.com>
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a driver
must guarantee non-concurrent accesses to this MDIO interface. The
most logical way is to have a separate driver that handles this
single MDIO interface, used by all Ethernet ports.
*) The MDIO interface is the same between the existing mv643xx_eth
driver and the new mvneta/mvpp2 driver. Even though it is for now
only used by the mvneta/mvpp2 driver, it will in the future be
used by the mv643xx_eth driver as well.
This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
802.3 Clause 45.
This patch also adds device tree binding for marvell MDIO driver.
Signed-off-by: Ken Ma <make@marvell.com>
---
MAINTAINERS | 1 +
arch/arm/Kconfig | 1 +
doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++
drivers/mdio/Kconfig | 10 ++
drivers/mdio/Makefile | 1 +
drivers/mdio/mvmdio.c | 237 +++++++++++++++++++++++++
6 files changed, 268 insertions(+)
create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt
create mode 100644 drivers/mdio/mvmdio.c
diff --git a/MAINTAINERS b/MAINTAINERS
index f66a904..fb58f17 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git
F: arch/arm/mach-kirkwood/
F: arch/arm/mach-mvebu/
F: drivers/ata/ahci_mvebu.c
+F: drivers/mdio/mvmdio.c
ARM MARVELL PXA
M: Marek Vasut <marex@denx.de>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index dde422b..aae4570 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -432,6 +432,7 @@ config ARCH_MVEBU
select DM_SPI
select DM_SPI_FLASH
select SPI
+ select DM_MDIO
config TARGET_DEVKIT3250
bool "Support devkit3250"
diff --git a/doc/device-tree-bindings/mdio/marvell-mdio.txt b/doc/device-tree-bindings/mdio/marvell-mdio.txt
new file mode 100644
index 0000000..55db435
--- /dev/null
+++ b/doc/device-tree-bindings/mdio/marvell-mdio.txt
@@ -0,0 +1,18 @@
+* Marvell MDIO Ethernet Controller interface
+
+The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k
+have an identical unit that provides an interface with the MDIO bus.
+This driver handles this MDIO interface.
+
+Mandatory properties:
+SoC specific:
+ - #address-cells: Must be <1>.
+ - #size-cells: Must be <0>.
+ - compatible: Should be "marvell,orion-mdio" (for SMI)
+ "marvell,xmdio" (for XSMI)
+ - reg: Base address and size SMI/XMSI bus.
+
+Optional properties:
+ - mdio-name - MDIO bus name
+
+For example, please refer to "mdio-bus.txt".
diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig
index 76e3758..ce251c5 100644
--- a/drivers/mdio/Kconfig
+++ b/drivers/mdio/Kconfig
@@ -15,4 +15,14 @@ config DM_MDIO
udevice or mii bus from its child phy node or
an ethernet udevice which the phy belongs to.
+config MVMDIO
+ bool "Marvell MDIO interface support"
+ depends on DM_MDIO
+ select PHYLIB
+ help
+ This driver supports the MDIO interface found in the network
+ interface units of the Marvell EBU SoCs (Kirkwood, Orion5x,
+ Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP).
+
+ This driver is used by the MVPP2 and MVNETA drivers.
endmenu
diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile
index 9b290c0..9f571aa 100644
--- a/drivers/mdio/Makefile
+++ b/drivers/mdio/Makefile
@@ -4,3 +4,4 @@
# Author: Ken Ma<make@marvell.com>
obj-$(CONFIG_DM_MDIO) += mdio-uclass.o
+obj-$(CONFIG_MVMDIO) += mvmdio.o
diff --git a/drivers/mdio/mvmdio.c b/drivers/mdio/mvmdio.c
new file mode 100644
index 0000000..b2c6636
--- /dev/null
+++ b/drivers/mdio/mvmdio.c
@@ -0,0 +1,237 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ * Author: Ken Ma<make@marvell.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <miiphy.h>
+#include <phy.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MVMDIO_SMI_DATA_SHIFT 0
+#define MVMDIO_SMI_PHY_ADDR_SHIFT 16
+#define MVMDIO_SMI_PHY_REG_SHIFT 21
+#define MVMDIO_SMI_READ_OPERATION BIT(26)
+#define MVMDIO_SMI_WRITE_OPERATION 0
+#define MVMDIO_SMI_READ_VALID BIT(27)
+#define MVMDIO_SMI_BUSY BIT(28)
+
+#define MVMDIO_XSMI_MGNT_REG 0x0
+#define MVMDIO_XSMI_PHYADDR_SHIFT 16
+#define MVMDIO_XSMI_DEVADDR_SHIFT 21
+#define MVMDIO_XSMI_WRITE_OPERATION (0x5 << 26)
+#define MVMDIO_XSMI_READ_OPERATION (0x7 << 26)
+#define MVMDIO_XSMI_READ_VALID BIT(29)
+#define MVMDIO_XSMI_BUSY BIT(30)
+#define MVMDIO_XSMI_ADDR_REG 0x8
+
+#define MVMDIO_TIMEOUT 10000
+
+struct mvmdio_priv {
+ void *mdio_base;
+};
+
+enum mvmdio_bus_type {
+ BUS_TYPE_SMI,
+ BUS_TYPE_XSMI
+};
+
+/* Wait for the SMI unit to be ready for another operation */
+static int mvmdio_smi_wait_ready(struct mii_dev *bus)
+{
+ u32 timeout = MVMDIO_TIMEOUT;
+ struct mvmdio_priv *priv = bus->priv;
+ u32 smi_reg;
+
+ /* Wait till the SMI is not busy */
+ do {
+ /* Read smi register */
+ smi_reg = readl(priv->mdio_base);
+ if (timeout-- == 0) {
+ debug("Error: SMI busy timeout\n");
+ return -ETIME;
+ }
+ } while (smi_reg & MVMDIO_SMI_BUSY);
+
+ return 0;
+}
+
+static int mvmdio_smi_read(struct mii_dev *bus, int addr,
+ int devad, int reg)
+{
+ struct mvmdio_priv *priv = bus->priv;
+ u32 val;
+ int ret;
+
+ if (devad != MDIO_DEVAD_NONE)
+ return -EOPNOTSUPP;
+
+ ret = mvmdio_smi_wait_ready(bus);
+ if (ret < 0)
+ return ret;
+
+ writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
+ (reg << MVMDIO_SMI_PHY_REG_SHIFT) |
+ MVMDIO_SMI_READ_OPERATION),
+ priv->mdio_base);
+
+ ret = mvmdio_smi_wait_ready(bus);
+ if (ret < 0)
+ return ret;
+
+ val = readl(priv->mdio_base);
+ if (!(val & MVMDIO_SMI_READ_VALID)) {
+ dev_err(bus->parent, "SMI bus read not valid\n");
+ return -ENODEV;
+ }
+
+ return val & GENMASK(15, 0);
+}
+
+static int mvmdio_smi_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
+{
+ struct mvmdio_priv *priv = bus->priv;
+ int ret;
+
+ if (devad != MDIO_DEVAD_NONE)
+ return -EOPNOTSUPP;
+
+ ret = mvmdio_smi_wait_ready(bus);
+ if (ret < 0)
+ return ret;
+
+ writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
+ (reg << MVMDIO_SMI_PHY_REG_SHIFT) |
+ MVMDIO_SMI_WRITE_OPERATION |
+ (value << MVMDIO_SMI_DATA_SHIFT)),
+ priv->mdio_base);
+
+ return 0;
+}
+
+static int mvmdio_xsmi_wait_ready(struct mii_dev *bus)
+{
+ u32 timeout = MVMDIO_TIMEOUT;
+ struct mvmdio_priv *priv = bus->priv;
+ u32 xsmi_reg;
+
+ /* Wait till the xSMI is not busy */
+ do {
+ /* Read xSMI register */
+ xsmi_reg = readl(priv->mdio_base);
+ if (timeout-- == 0) {
+ debug("xSMI busy time-out\n");
+ return -ETIME;
+ }
+ } while (xsmi_reg & MVMDIO_XSMI_BUSY);
+
+ return 0;
+}
+
+static int mvmdio_xsmi_read(struct mii_dev *bus, int addr,
+ int devad, int reg)
+{
+ struct mvmdio_priv *priv = bus->priv;
+ int ret;
+
+ if (devad == MDIO_DEVAD_NONE)
+ return -EOPNOTSUPP;
+
+ ret = mvmdio_xsmi_wait_ready(bus);
+ if (ret < 0)
+ return ret;
+
+ writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG);
+ writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) |
+ (devad << MVMDIO_XSMI_DEVADDR_SHIFT) |
+ MVMDIO_XSMI_READ_OPERATION),
+ priv->mdio_base + MVMDIO_XSMI_MGNT_REG);
+
+ ret = mvmdio_xsmi_wait_ready(bus);
+ if (ret < 0)
+ return ret;
+
+ if (!(readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) &
+ MVMDIO_XSMI_READ_VALID)) {
+ dev_err(bus->parent, "XSMI bus read not valid\n");
+ return -ENODEV;
+ }
+
+ return readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) & GENMASK(15, 0);
+}
+
+static int mvmdio_xsmi_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
+{
+ struct mvmdio_priv *priv = bus->priv;
+ int ret;
+
+ if (devad == MDIO_DEVAD_NONE)
+ return -EOPNOTSUPP;
+
+ ret = mvmdio_xsmi_wait_ready(bus);
+ if (ret < 0)
+ return ret;
+
+ writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG);
+ writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) |
+ (devad << MVMDIO_XSMI_DEVADDR_SHIFT) |
+ MVMDIO_XSMI_WRITE_OPERATION | value),
+ priv->mdio_base + MVMDIO_XSMI_MGNT_REG);
+
+ return 0;
+}
+
+static int mvmdio_probe(struct udevice *dev)
+{
+ struct mii_dev **pbus = dev_get_uclass_platdata(dev);
+ struct mii_dev *bus = *pbus;
+ struct mvmdio_priv *priv;
+ enum mvmdio_bus_type type;
+
+ priv = dev_get_priv(dev);
+ priv->mdio_base = (void *)devfdt_get_addr(dev);
+ bus->priv = priv;
+
+ type = (enum mvmdio_bus_type)dev_get_driver_data(dev);
+ switch (type) {
+ case BUS_TYPE_SMI:
+ bus->read = mvmdio_smi_read;
+ bus->write = mvmdio_smi_write;
+ if (!bus->name)
+ snprintf(bus->name, MDIO_NAME_LEN,
+ "orion-mdio.%p", priv->mdio_base);
+ break;
+ case BUS_TYPE_XSMI:
+ bus->read = mvmdio_xsmi_read;
+ bus->write = mvmdio_xsmi_write;
+ if (!bus->name)
+ snprintf(bus->name, MDIO_NAME_LEN,
+ "xmdio.%p", priv->mdio_base);
+ break;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id mvmdio_ids[] = {
+ { .compatible = "marvell,orion-mdio", .data = BUS_TYPE_SMI },
+ { .compatible = "marvell,xmdio", .data = BUS_TYPE_XSMI },
+ { }
+};
+
+U_BOOT_DRIVER(mvmdio) = {
+ .name = "mvmdio",
+ .id = UCLASS_MDIO,
+ .of_match = mvmdio_ids,
+ .probe = mvmdio_probe,
+ .priv_auto_alloc_size = sizeof(struct mvmdio_priv),
+};
+
--
1.9.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver
2018-06-06 7:56 ` [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver make at marvell.com
@ 2018-06-06 8:52 ` Chris Packham
2018-06-06 14:12 ` [U-Boot] [EXT] " Ken Ma
0 siblings, 1 reply; 5+ messages in thread
From: Chris Packham @ 2018-06-06 8:52 UTC (permalink / raw)
To: u-boot
Hi Ken,
On Wed, Jun 6, 2018 at 8:06 PM <make@marvell.com> wrote:
>
> From: Ken Ma <make@marvell.com>
aside, awesome email address for someone in embedded development :)
Some minor comments below
Reviewed-by: Chris Packham <judge.packham@gmail.com>
> This patch adds a separate driver for the MDIO interface of the
> Marvell Ethernet controllers based on driver model. There are two
> reasons to have a separate driver rather than including it inside
> the MAC driver itself:
> *) The MDIO interface is shared by all Ethernet ports, so a driver
> must guarantee non-concurrent accesses to this MDIO interface. The
> most logical way is to have a separate driver that handles this
> single MDIO interface, used by all Ethernet ports.
> *) The MDIO interface is the same between the existing mv643xx_eth
> driver and the new mvneta/mvpp2 driver. Even though it is for now
> only used by the mvneta/mvpp2 driver, it will in the future be
> used by the mv643xx_eth driver as well.
Yay.
In u-boot mv643xx_eth is mvgbe.c. I've been looking at converting it
to DM but the first problem I hit was the MDIO interface so this is
very much welcome. Were you planning on adding an actual mv643xx_eth
driver or is that just a copy/paste from Linux?
>
> This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
> 802.3 Clause 45.
>
> This patch also adds device tree binding for marvell MDIO driver.
>
> Signed-off-by: Ken Ma <make@marvell.com>
> ---
>
> MAINTAINERS | 1 +
> arch/arm/Kconfig | 1 +
> doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++
> drivers/mdio/Kconfig | 10 ++
> drivers/mdio/Makefile | 1 +
> drivers/mdio/mvmdio.c | 237 +++++++++++++++++++++++++
> 6 files changed, 268 insertions(+)
> create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt
> create mode 100644 drivers/mdio/mvmdio.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f66a904..fb58f17 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git
> F: arch/arm/mach-kirkwood/
> F: arch/arm/mach-mvebu/
> F: drivers/ata/ahci_mvebu.c
> +F: drivers/mdio/mvmdio.c
>
> ARM MARVELL PXA
> M: Marek Vasut <marex@denx.de>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index dde422b..aae4570 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -432,6 +432,7 @@ config ARCH_MVEBU
> select DM_SPI
> select DM_SPI_FLASH
> select SPI
> + select DM_MDIO
>
> config TARGET_DEVKIT3250
> bool "Support devkit3250"
> diff --git a/doc/device-tree-bindings/mdio/marvell-mdio.txt b/doc/device-tree-bindings/mdio/marvell-mdio.txt
> new file mode 100644
> index 0000000..55db435
> --- /dev/null
> +++ b/doc/device-tree-bindings/mdio/marvell-mdio.txt
> @@ -0,0 +1,18 @@
> +* Marvell MDIO Ethernet Controller interface
> +
> +The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k
> +have an identical unit that provides an interface with the MDIO bus.
> +This driver handles this MDIO interface.
> +
> +Mandatory properties:
> +SoC specific:
> + - #address-cells: Must be <1>.
> + - #size-cells: Must be <0>.
> + - compatible: Should be "marvell,orion-mdio" (for SMI)
> + "marvell,xmdio" (for XSMI)
> + - reg: Base address and size SMI/XMSI bus.
> +
> +Optional properties:
> + - mdio-name - MDIO bus name
> +
> +For example, please refer to "mdio-bus.txt".
> diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig
> index 76e3758..ce251c5 100644
> --- a/drivers/mdio/Kconfig
> +++ b/drivers/mdio/Kconfig
> @@ -15,4 +15,14 @@ config DM_MDIO
> udevice or mii bus from its child phy node or
> an ethernet udevice which the phy belongs to.
>
> +config MVMDIO
> + bool "Marvell MDIO interface support"
> + depends on DM_MDIO
> + select PHYLIB
> + help
> + This driver supports the MDIO interface found in the network
> + interface units of the Marvell EBU SoCs (Kirkwood, Orion5x,
> + Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP).
> +
> + This driver is used by the MVPP2 and MVNETA drivers.
> endmenu
> diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile
> index 9b290c0..9f571aa 100644
> --- a/drivers/mdio/Makefile
> +++ b/drivers/mdio/Makefile
> @@ -4,3 +4,4 @@
> # Author: Ken Ma<make@marvell.com>
>
> obj-$(CONFIG_DM_MDIO) += mdio-uclass.o
> +obj-$(CONFIG_MVMDIO) += mvmdio.o
> diff --git a/drivers/mdio/mvmdio.c b/drivers/mdio/mvmdio.c
> new file mode 100644
> index 0000000..b2c6636
> --- /dev/null
> +++ b/drivers/mdio/mvmdio.c
> @@ -0,0 +1,237 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Marvell International Ltd.
> + * Author: Ken Ma<make@marvell.com>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <dm/device-internal.h>
> +#include <dm/lists.h>
> +#include <miiphy.h>
> +#include <phy.h>
> +#include <asm/io.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define MVMDIO_SMI_DATA_SHIFT 0
> +#define MVMDIO_SMI_PHY_ADDR_SHIFT 16
> +#define MVMDIO_SMI_PHY_REG_SHIFT 21
> +#define MVMDIO_SMI_READ_OPERATION BIT(26)
> +#define MVMDIO_SMI_WRITE_OPERATION 0
> +#define MVMDIO_SMI_READ_VALID BIT(27)
> +#define MVMDIO_SMI_BUSY BIT(28)
> +
> +#define MVMDIO_XSMI_MGNT_REG 0x0
> +#define MVMDIO_XSMI_PHYADDR_SHIFT 16
> +#define MVMDIO_XSMI_DEVADDR_SHIFT 21
> +#define MVMDIO_XSMI_WRITE_OPERATION (0x5 << 26)
> +#define MVMDIO_XSMI_READ_OPERATION (0x7 << 26)
> +#define MVMDIO_XSMI_READ_VALID BIT(29)
> +#define MVMDIO_XSMI_BUSY BIT(30)
> +#define MVMDIO_XSMI_ADDR_REG 0x8
> +
> +#define MVMDIO_TIMEOUT 10000
> +
> +struct mvmdio_priv {
> + void *mdio_base;
> +};
> +
> +enum mvmdio_bus_type {
> + BUS_TYPE_SMI,
> + BUS_TYPE_XSMI
> +};
> +
> +/* Wait for the SMI unit to be ready for another operation */
> +static int mvmdio_smi_wait_ready(struct mii_dev *bus)
> +{
> + u32 timeout = MVMDIO_TIMEOUT;
> + struct mvmdio_priv *priv = bus->priv;
> + u32 smi_reg;
> +
> + /* Wait till the SMI is not busy */
> + do {
> + /* Read smi register */
> + smi_reg = readl(priv->mdio_base);
> + if (timeout-- == 0) {
> + debug("Error: SMI busy timeout\n");
Should this be dev_err(bus->parent, ...); ?
> + return -ETIME;
> + }
> + } while (smi_reg & MVMDIO_SMI_BUSY);
> +
> + return 0;
> +}
> +
> +static int mvmdio_smi_read(struct mii_dev *bus, int addr,
> + int devad, int reg)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + u32 val;
> + int ret;
> +
> + if (devad != MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
mvgbe has a feature to read back the PHY address via the PHY Address
Register which I assume is configureable via hardware strapping. Looks
like the Armada-38x has the same feature although the mvneta driver
doesn't implement it. Should this new driver include this?
> +
> + ret = mvmdio_smi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
> + (reg << MVMDIO_SMI_PHY_REG_SHIFT) |
> + MVMDIO_SMI_READ_OPERATION),
> + priv->mdio_base);
> +
> + ret = mvmdio_smi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + val = readl(priv->mdio_base);
> + if (!(val & MVMDIO_SMI_READ_VALID)) {
> + dev_err(bus->parent, "SMI bus read not valid\n");
> + return -ENODEV;
> + }
> +
> + return val & GENMASK(15, 0);
> +}
> +
> +static int mvmdio_smi_write(struct mii_dev *bus, int addr, int devad,
> + int reg, u16 value)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + int ret;
> +
> + if (devad != MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
> +
> + ret = mvmdio_smi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
> + (reg << MVMDIO_SMI_PHY_REG_SHIFT) |
> + MVMDIO_SMI_WRITE_OPERATION |
> + (value << MVMDIO_SMI_DATA_SHIFT)),
> + priv->mdio_base);
> +
> + return 0;
> +}
> +
> +static int mvmdio_xsmi_wait_ready(struct mii_dev *bus)
> +{
> + u32 timeout = MVMDIO_TIMEOUT;
> + struct mvmdio_priv *priv = bus->priv;
> + u32 xsmi_reg;
> +
> + /* Wait till the xSMI is not busy */
> + do {
> + /* Read xSMI register */
> + xsmi_reg = readl(priv->mdio_base);
> + if (timeout-- == 0) {
> + debug("xSMI busy time-out\n");
Should this be dev_err(bus->parent, ...); ?
> + return -ETIME;
> + }
> + } while (xsmi_reg & MVMDIO_XSMI_BUSY);
> +
> + return 0;
> +}
> +
> +static int mvmdio_xsmi_read(struct mii_dev *bus, int addr,
> + int devad, int reg)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + int ret;
> +
> + if (devad == MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
> +
> + ret = mvmdio_xsmi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG);
> + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) |
> + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) |
> + MVMDIO_XSMI_READ_OPERATION),
> + priv->mdio_base + MVMDIO_XSMI_MGNT_REG);
> +
> + ret = mvmdio_xsmi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + if (!(readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) &
> + MVMDIO_XSMI_READ_VALID)) {
> + dev_err(bus->parent, "XSMI bus read not valid\n");
> + return -ENODEV;
> + }
> +
> + return readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) & GENMASK(15, 0);
> +}
> +
> +static int mvmdio_xsmi_write(struct mii_dev *bus, int addr, int devad,
> + int reg, u16 value)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + int ret;
> +
> + if (devad == MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
> +
> + ret = mvmdio_xsmi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG);
> + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) |
> + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) |
> + MVMDIO_XSMI_WRITE_OPERATION | value),
> + priv->mdio_base + MVMDIO_XSMI_MGNT_REG);
> +
> + return 0;
> +}
> +
> +static int mvmdio_probe(struct udevice *dev)
> +{
> + struct mii_dev **pbus = dev_get_uclass_platdata(dev);
> + struct mii_dev *bus = *pbus;
> + struct mvmdio_priv *priv;
> + enum mvmdio_bus_type type;
> +
> + priv = dev_get_priv(dev);
> + priv->mdio_base = (void *)devfdt_get_addr(dev);
> + bus->priv = priv;
> +
> + type = (enum mvmdio_bus_type)dev_get_driver_data(dev);
> + switch (type) {
> + case BUS_TYPE_SMI:
> + bus->read = mvmdio_smi_read;
> + bus->write = mvmdio_smi_write;
> + if (!bus->name)
> + snprintf(bus->name, MDIO_NAME_LEN,
> + "orion-mdio.%p", priv->mdio_base);
> + break;
> + case BUS_TYPE_XSMI:
> + bus->read = mvmdio_xsmi_read;
> + bus->write = mvmdio_xsmi_write;
> + if (!bus->name)
> + snprintf(bus->name, MDIO_NAME_LEN,
> + "xmdio.%p", priv->mdio_base);
> + break;
> + }
> +
> + return 0;
> +}
> +
> +static const struct udevice_id mvmdio_ids[] = {
> + { .compatible = "marvell,orion-mdio", .data = BUS_TYPE_SMI },
> + { .compatible = "marvell,xmdio", .data = BUS_TYPE_XSMI },
> + { }
> +};
> +
> +U_BOOT_DRIVER(mvmdio) = {
> + .name = "mvmdio",
> + .id = UCLASS_MDIO,
> + .of_match = mvmdio_ids,
> + .probe = mvmdio_probe,
> + .priv_auto_alloc_size = sizeof(struct mvmdio_priv),
> +};
> +
> --
> 1.9.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [EXT] Re: [PATCH 2/2] mdio: add marvell MDIO driver
2018-06-06 8:52 ` Chris Packham
@ 2018-06-06 14:12 ` Ken Ma
0 siblings, 0 replies; 5+ messages in thread
From: Ken Ma @ 2018-06-06 14:12 UTC (permalink / raw)
To: u-boot
Hi Chris
Thanks a lot for your detailed review and kind advice!
Please see my inline reply.
Yours,
Ken
________________________________________
From: Chris Packham <judge.packham@gmail.com>
Sent: Wednesday, June 6, 2018 1:52 AM
To: Ken Ma
Cc: u-boot; Prafulla Wadaskar; Luka Perkov; xypron.glpk at gmx.de; Michal Simek; Alexander Graf; Stefan Roese; Eugeniy.Paltsev at synopsys.com
Subject: [EXT] Re: [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver
External Email
----------------------------------------------------------------------
Hi Ken,
On Wed, Jun 6, 2018 at 8:06 PM <make@marvell.com> wrote:
>
> From: Ken Ma <make@marvell.com>
aside, awesome email address for someone in embedded development :)
Some minor comments below
Reviewed-by: Chris Packham <judge.packham@gmail.com>
> This patch adds a separate driver for the MDIO interface of the
> Marvell Ethernet controllers based on driver model. There are two
> reasons to have a separate driver rather than including it inside
> the MAC driver itself:
> *) The MDIO interface is shared by all Ethernet ports, so a driver
> must guarantee non-concurrent accesses to this MDIO interface. The
> most logical way is to have a separate driver that handles this
> single MDIO interface, used by all Ethernet ports.
> *) The MDIO interface is the same between the existing mv643xx_eth
> driver and the new mvneta/mvpp2 driver. Even though it is for now
> only used by the mvneta/mvpp2 driver, it will in the future be
> used by the mv643xx_eth driver as well.
Yay.
In u-boot mv643xx_eth is mvgbe.c. I've been looking at converting it
to DM but the first problem I hit was the MDIO interface so this is
very much welcome. Were you planning on adding an actual mv643xx_eth
driver or is that just a copy/paste from Linux?
[Ken] Sorry, currently we have no such a plan to add DM mv643xx_eth driver.
By the way, with new mdio driver on uclass DM, we can support such a case that
an ethernet device use a phy which is controlled by another chip's mdio(that's to say,
ethernet device registers and the mdio register are not in a range)
>
> This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
> 802.3 Clause 45.
>
> This patch also adds device tree binding for marvell MDIO driver.
>
> Signed-off-by: Ken Ma <make@marvell.com>
> ---
>
> MAINTAINERS | 1 +
> arch/arm/Kconfig | 1 +
> doc/device-tree-bindings/mdio/marvell-mdio.txt | 18 ++
> drivers/mdio/Kconfig | 10 ++
> drivers/mdio/Makefile | 1 +
> drivers/mdio/mvmdio.c | 237 +++++++++++++++++++++++++
> 6 files changed, 268 insertions(+)
> create mode 100644 doc/device-tree-bindings/mdio/marvell-mdio.txt
> create mode 100644 drivers/mdio/mvmdio.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f66a904..fb58f17 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git
> F: arch/arm/mach-kirkwood/
> F: arch/arm/mach-mvebu/
> F: drivers/ata/ahci_mvebu.c
> +F: drivers/mdio/mvmdio.c
>
> ARM MARVELL PXA
> M: Marek Vasut <marex@denx.de>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index dde422b..aae4570 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -432,6 +432,7 @@ config ARCH_MVEBU
> select DM_SPI
> select DM_SPI_FLASH
> select SPI
> + select DM_MDIO
>
> config TARGET_DEVKIT3250
> bool "Support devkit3250"
> diff --git a/doc/device-tree-bindings/mdio/marvell-mdio.txt b/doc/device-tree-bindings/mdio/marvell-mdio.txt
> new file mode 100644
> index 0000000..55db435
> --- /dev/null
> +++ b/doc/device-tree-bindings/mdio/marvell-mdio.txt
> @@ -0,0 +1,18 @@
> +* Marvell MDIO Ethernet Controller interface
> +
> +The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k
> +have an identical unit that provides an interface with the MDIO bus.
> +This driver handles this MDIO interface.
> +
> +Mandatory properties:
> +SoC specific:
> + - #address-cells: Must be <1>.
> + - #size-cells: Must be <0>.
> + - compatible: Should be "marvell,orion-mdio" (for SMI)
> + "marvell,xmdio" (for XSMI)
> + - reg: Base address and size SMI/XMSI bus.
> +
> +Optional properties:
> + - mdio-name - MDIO bus name
> +
> +For example, please refer to "mdio-bus.txt".
> diff --git a/drivers/mdio/Kconfig b/drivers/mdio/Kconfig
> index 76e3758..ce251c5 100644
> --- a/drivers/mdio/Kconfig
> +++ b/drivers/mdio/Kconfig
> @@ -15,4 +15,14 @@ config DM_MDIO
> udevice or mii bus from its child phy node or
> an ethernet udevice which the phy belongs to.
>
> +config MVMDIO
> + bool "Marvell MDIO interface support"
> + depends on DM_MDIO
> + select PHYLIB
> + help
> + This driver supports the MDIO interface found in the network
> + interface units of the Marvell EBU SoCs (Kirkwood, Orion5x,
> + Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP).
> +
> + This driver is used by the MVPP2 and MVNETA drivers.
> endmenu
> diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile
> index 9b290c0..9f571aa 100644
> --- a/drivers/mdio/Makefile
> +++ b/drivers/mdio/Makefile
> @@ -4,3 +4,4 @@
> # Author: Ken Ma<make@marvell.com>
>
> obj-$(CONFIG_DM_MDIO) += mdio-uclass.o
> +obj-$(CONFIG_MVMDIO) += mvmdio.o
> diff --git a/drivers/mdio/mvmdio.c b/drivers/mdio/mvmdio.c
> new file mode 100644
> index 0000000..b2c6636
> --- /dev/null
> +++ b/drivers/mdio/mvmdio.c
> @@ -0,0 +1,237 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Marvell International Ltd.
> + * Author: Ken Ma<make@marvell.com>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <dm/device-internal.h>
> +#include <dm/lists.h>
> +#include <miiphy.h>
> +#include <phy.h>
> +#include <asm/io.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define MVMDIO_SMI_DATA_SHIFT 0
> +#define MVMDIO_SMI_PHY_ADDR_SHIFT 16
> +#define MVMDIO_SMI_PHY_REG_SHIFT 21
> +#define MVMDIO_SMI_READ_OPERATION BIT(26)
> +#define MVMDIO_SMI_WRITE_OPERATION 0
> +#define MVMDIO_SMI_READ_VALID BIT(27)
> +#define MVMDIO_SMI_BUSY BIT(28)
> +
> +#define MVMDIO_XSMI_MGNT_REG 0x0
> +#define MVMDIO_XSMI_PHYADDR_SHIFT 16
> +#define MVMDIO_XSMI_DEVADDR_SHIFT 21
> +#define MVMDIO_XSMI_WRITE_OPERATION (0x5 << 26)
> +#define MVMDIO_XSMI_READ_OPERATION (0x7 << 26)
> +#define MVMDIO_XSMI_READ_VALID BIT(29)
> +#define MVMDIO_XSMI_BUSY BIT(30)
> +#define MVMDIO_XSMI_ADDR_REG 0x8
> +
> +#define MVMDIO_TIMEOUT 10000
> +
> +struct mvmdio_priv {
> + void *mdio_base;
> +};
> +
> +enum mvmdio_bus_type {
> + BUS_TYPE_SMI,
> + BUS_TYPE_XSMI
> +};
> +
> +/* Wait for the SMI unit to be ready for another operation */
> +static int mvmdio_smi_wait_ready(struct mii_dev *bus)
> +{
> + u32 timeout = MVMDIO_TIMEOUT;
> + struct mvmdio_priv *priv = bus->priv;
> + u32 smi_reg;
> +
> + /* Wait till the SMI is not busy */
> + do {
> + /* Read smi register */
> + smi_reg = readl(priv->mdio_base);
> + if (timeout-- == 0) {
> + debug("Error: SMI busy timeout\n");
Should this be dev_err(bus->parent, ...); ?
[Ken] Thank you very much, I will update it.
> + return -ETIME;
> + }
> + } while (smi_reg & MVMDIO_SMI_BUSY);
> +
> + return 0;
> +}
> +
> +static int mvmdio_smi_read(struct mii_dev *bus, int addr,
> + int devad, int reg)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + u32 val;
> + int ret;
> +
> + if (devad != MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
mvgbe has a feature to read back the PHY address via the PHY Address
Register which I assume is configureable via hardware strapping. Looks
like the Armada-38x has the same feature although the mvneta driver
doesn't implement it. Should this new driver include this?
[Ken] I just checked it and in my opinion, we should not include it in mdio driver, the function belongs to network driver
since ethernet port can read its phy address register(this register belongs to ethernet registers range) to get its phy address.
And although an ethernet device can have a member which points to the mdio bus of its phy, but a mdio bus should not have a member which points to an ethernet device,
for example, a mdio bus can have several phys, phy0 belongs to ethnet device 0, phy1 belongs to ethnet device 1, phy2 belongs to ethnet device 2...
in mvgbe.c
static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
49 int reg_ofs)
50 {
51 u16 data = 0;
52 struct eth_device *dev = eth_get_dev_by_name(bus->name); ### this is not right, a mii bus can have several phys which are used by several ethernet devices
53 struct mvgbe_device *dmvgbe = to_mvgbe(dev);
54 struct mvgbe_registers *regs = dmvgbe->regs;
> +
> + ret = mvmdio_smi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
> + (reg << MVMDIO_SMI_PHY_REG_SHIFT) |
> + MVMDIO_SMI_READ_OPERATION),
> + priv->mdio_base);
> +
> + ret = mvmdio_smi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + val = readl(priv->mdio_base);
> + if (!(val & MVMDIO_SMI_READ_VALID)) {
> + dev_err(bus->parent, "SMI bus read not valid\n");
> + return -ENODEV;
> + }
> +
> + return val & GENMASK(15, 0);
> +}
> +
> +static int mvmdio_smi_write(struct mii_dev *bus, int addr, int devad,
> + int reg, u16 value)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + int ret;
> +
> + if (devad != MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
> +
> + ret = mvmdio_smi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
> + (reg << MVMDIO_SMI_PHY_REG_SHIFT) |
> + MVMDIO_SMI_WRITE_OPERATION |
> + (value << MVMDIO_SMI_DATA_SHIFT)),
> + priv->mdio_base);
> +
> + return 0;
> +}
> +
> +static int mvmdio_xsmi_wait_ready(struct mii_dev *bus)
> +{
> + u32 timeout = MVMDIO_TIMEOUT;
> + struct mvmdio_priv *priv = bus->priv;
> + u32 xsmi_reg;
> +
> + /* Wait till the xSMI is not busy */
> + do {
> + /* Read xSMI register */
> + xsmi_reg = readl(priv->mdio_base);
> + if (timeout-- == 0) {
> + debug("xSMI busy time-out\n");
Should this be dev_err(bus->parent, ...); ?
[Ken] Thank you very much, I will update it.
> + return -ETIME;
> + }
> + } while (xsmi_reg & MVMDIO_XSMI_BUSY);
> +
> + return 0;
> +}
> +
> +static int mvmdio_xsmi_read(struct mii_dev *bus, int addr,
> + int devad, int reg)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + int ret;
> +
> + if (devad == MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
> +
> + ret = mvmdio_xsmi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG);
> + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) |
> + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) |
> + MVMDIO_XSMI_READ_OPERATION),
> + priv->mdio_base + MVMDIO_XSMI_MGNT_REG);
> +
> + ret = mvmdio_xsmi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + if (!(readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) &
> + MVMDIO_XSMI_READ_VALID)) {
> + dev_err(bus->parent, "XSMI bus read not valid\n");
> + return -ENODEV;
> + }
> +
> + return readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) & GENMASK(15, 0);
> +}
> +
> +static int mvmdio_xsmi_write(struct mii_dev *bus, int addr, int devad,
> + int reg, u16 value)
> +{
> + struct mvmdio_priv *priv = bus->priv;
> + int ret;
> +
> + if (devad == MDIO_DEVAD_NONE)
> + return -EOPNOTSUPP;
> +
> + ret = mvmdio_xsmi_wait_ready(bus);
> + if (ret < 0)
> + return ret;
> +
> + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG);
> + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) |
> + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) |
> + MVMDIO_XSMI_WRITE_OPERATION | value),
> + priv->mdio_base + MVMDIO_XSMI_MGNT_REG);
> +
> + return 0;
> +}
> +
> +static int mvmdio_probe(struct udevice *dev)
> +{
> + struct mii_dev **pbus = dev_get_uclass_platdata(dev);
> + struct mii_dev *bus = *pbus;
> + struct mvmdio_priv *priv;
> + enum mvmdio_bus_type type;
> +
> + priv = dev_get_priv(dev);
> + priv->mdio_base = (void *)devfdt_get_addr(dev);
> + bus->priv = priv;
> +
> + type = (enum mvmdio_bus_type)dev_get_driver_data(dev);
> + switch (type) {
> + case BUS_TYPE_SMI:
> + bus->read = mvmdio_smi_read;
> + bus->write = mvmdio_smi_write;
> + if (!bus->name)
> + snprintf(bus->name, MDIO_NAME_LEN,
> + "orion-mdio.%p", priv->mdio_base);
> + break;
> + case BUS_TYPE_XSMI:
> + bus->read = mvmdio_xsmi_read;
> + bus->write = mvmdio_xsmi_write;
> + if (!bus->name)
> + snprintf(bus->name, MDIO_NAME_LEN,
> + "xmdio.%p", priv->mdio_base);
> + break;
> + }
> +
> + return 0;
> +}
> +
> +static const struct udevice_id mvmdio_ids[] = {
> + { .compatible = "marvell,orion-mdio", .data = BUS_TYPE_SMI },
> + { .compatible = "marvell,xmdio", .data = BUS_TYPE_XSMI },
> + { }
> +};
> +
> +U_BOOT_DRIVER(mvmdio) = {
> + .name = "mvmdio",
> + .id = UCLASS_MDIO,
> + .of_match = mvmdio_ids,
> + .probe = mvmdio_probe,
> + .priv_auto_alloc_size = sizeof(struct mvmdio_priv),
> +};
> +
> --
> 1.9.1
>
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^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-06-06 14:12 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-06-06 7:56 [U-Boot] [PATCH 0/2] Add MDIO driver model support make at marvell.com
2018-06-06 7:56 ` [U-Boot] [PATCH 1/2] dm: mdio: add a uclass for MDIO make at marvell.com
2018-06-06 7:56 ` [U-Boot] [PATCH 2/2] mdio: add marvell MDIO driver make at marvell.com
2018-06-06 8:52 ` Chris Packham
2018-06-06 14:12 ` [U-Boot] [EXT] " Ken Ma
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