From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chee, Tien Fong <tien.fong.chee@intel.com>
Date: Thu, 21 Jun 2018 06:31:49 +0000
Subject: [U-Boot] [PATCH v2] common/memsize.c: Increase save array for
 supporting memory size > 4GB
In-Reply-To: <1215cf71-35dc-6c10-2607-fb840c82c01f@denx.de>
References: <1529478380-28224-1-git-send-email-tien.fong.chee@intel.com>
 <1215cf71-35dc-6c10-2607-fb840c82c01f@denx.de>
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On Thu, 2018-06-21 at 06:34 +0200, Marek Vasut wrote:
> On 06/20/2018 09:06 AM, tien.fong.chee at intel.com wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > 
> > In ARM 64-bits, memory size can be supported is more than 4GB,
> > hence increasing save array is needed to cope with testing larger
> > memory.
> > 
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > ---
> > 
> > Changes in v2:
> > - Change save array size to save[BITS_PER_LONG - 1]
> > ---
> >  common/memsize.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/common/memsize.c b/common/memsize.c
> > index 5670e95..13b0047 100644
> > --- a/common/memsize.c
> > +++ b/common/memsize.c
> > @@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
> >  long get_ram_size(long *base, long maxsize)
> >  {
> >  	volatile long *addr;
> > -	long           save[31];
> > +	long           save[BITS_PER_LONG - 1];
> >  	long           save_base;
> >  	long           cnt;
> >  	long           val;
> > 
> Does this work with LPAE systems, where bits per long == 32 and the
> address space is bigger ? Or with similar setups ? I mean, you can
> have
> > 
> > 4 GiB of RAM on 32bit system ...
This function is designed to work with 32bit or 64 bits system, for
example the argument such as maxsize can be 32bit or 64 bit, if value
larger than 4GiB is passed as maxsize argument with 32bit system, the
whole thing will go wrong.