From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bin Meng Date: Fri, 10 Aug 2018 02:39:37 -0700 Subject: [U-Boot] [PATCH 5/6] x86: coreboot: Add default TSC frequency in the device tree In-Reply-To: <1533893978-12838-1-git-send-email-bmeng.cn@gmail.com> References: <1533893978-12838-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1533893978-12838-5-git-send-email-bmeng.cn@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de It was observed sometimes U-Boot as the coreboot payload fails to boot on QEMU. This is because TSC calibration fails with no valid frequency. This adds default TSC frequency in the device tree. Signed-off-by: Bin Meng --- arch/x86/dts/coreboot.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index a94f781..e212f3d 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -30,6 +30,10 @@ stdout-path = "/serial"; }; + tsc-timer { + clock-frequency = <1000000000>; + }; + pci { compatible = "pci-x86"; u-boot,dm-pre-reloc; -- 2.7.4