From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?utf-8?Q?Beno=C3=AEt_Th=C3=A9baudeau?= Date: Tue, 21 Aug 2012 00:20:24 +0200 (CEST) Subject: [U-Boot] ROM_SI_REV on MX5 In-Reply-To: Message-ID: <1537866211.2613888.1345501224399.JavaMail.root@advansee.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Matt, > Can anyone tell me where this offset is in relation to, or what it's > actually meant to be? > > Some parts of U-Boot read it out but I can't figure any part of the > docs that refers to this magic 0x48 offset or what it could be (or > what it should be when you read it out)? See "Figure 9-1. Internal ROM and RAM Memory Map" in the i.MX51 RM. This is the only reference to it that I find in the RM. All the details probably come from FSL's code. I think that it's close to IIM.SREV, if not the same. It's supposed to be a ROM version, but it's used like a silicon/tapeout revision. Best regards, Beno?t