[U-Boot] [PATCH 00/19] riscv: Adding RISC-V CPU and timer driver

[Bin Meng <bmeng.cn@gmail.com>]

This adds DM drivers to support RISC-V CPU and timer.

The U-Boot RISC-V SBI support is still working in progress.
Some patches in this series like adding CSR numbers, exception
numbers, are prerequisites for the SBI implementation, but it
does no harm to include them as part of this series.

This series is dependent on Lukas's riscv series @
http://patchwork.ozlabs.org/project/uboot/list/?series=74999

This series is available at u-boot-x86/riscv-working for testing.


Bin Meng (18):
  dm: cpu: Add timebase frequency to the platdata
  riscv: qemu: Create a simple-bus driver for the soc node
  cpu: Add a RISC-V CPU driver
  riscv: Add a SYSCON driver for Core Local Interruptor
  timer: Add driver for RISC-V privileged architecture defined timer
  riscv: kconfig: Allow platform to specify Kconfig options
  riscv: Enlarge the default SYS_MALLOC_F_LEN
  riscv: qemu: Probe cpus during boot
  riscv: Add CSR numbers
  riscv: Add exception codes for xcause register
  riscv: Do some basic architecture level cpu initialization
  riscv: Move trap handler codes to mtrap.S
  riscv: Fix context restore before returning from trap handler
  riscv: Return to previous privilege level after trap handling
  riscv: Adjust the _exit_trap() position to come before handle_trap()
  riscv: Pass correct exception code to _exit_trap()
  riscv: Refactor handle_trap() a little for future extension
  riscv: Allow U-Boot to run on hart 0 only

Lukas Auer (1):
  riscv: add Kconfig entries for the code model

 arch/riscv/Kconfig                 |  35 ++++++
 arch/riscv/Makefile                |   9 +-
 arch/riscv/cpu/Makefile            |   2 +-
 arch/riscv/cpu/cpu.c               |  21 ++++
 arch/riscv/cpu/mtrap.S             | 103 ++++++++++++++++
 arch/riscv/cpu/qemu/Kconfig        |  10 ++
 arch/riscv/cpu/qemu/cpu.c          |  27 +++++
 arch/riscv/cpu/start.S             |  86 +-------------
 arch/riscv/include/asm/clint.h     |  24 ++++
 arch/riscv/include/asm/encoding.h  | 234 +++++++++++++++++++++++++++++++++++++
 arch/riscv/lib/Makefile            |   1 +
 arch/riscv/lib/clint.c             |  69 +++++++++++
 arch/riscv/lib/interrupts.c        |  78 +++++++------
 board/emulation/qemu-riscv/Kconfig |   1 +
 drivers/cpu/Kconfig                |   6 +
 drivers/cpu/Makefile               |   1 +
 drivers/cpu/riscv_cpu.c            | 117 +++++++++++++++++++
 drivers/timer/Kconfig              |   8 ++
 drivers/timer/Makefile             |   1 +
 drivers/timer/riscv_timer.c        |  50 ++++++++
 include/cpu.h                      |   3 +
 21 files changed, 764 insertions(+), 122 deletions(-)
 create mode 100644 arch/riscv/cpu/mtrap.S
 create mode 100644 arch/riscv/cpu/qemu/Kconfig
 create mode 100644 arch/riscv/include/asm/clint.h
 create mode 100644 arch/riscv/lib/clint.c
 create mode 100644 drivers/cpu/riscv_cpu.c
 create mode 100644 drivers/timer/riscv_timer.c

-- 
2.7.4