From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chee, Tien Fong Date: Fri, 23 Nov 2018 10:10:25 +0000 Subject: [U-Boot] [PATCH 6/9] ARM: socfpga: Set default DTB address on A10 In-Reply-To: References: <1542796908-7947-1-git-send-email-tien.fong.chee@intel.com> <1542796908-7947-7-git-send-email-tien.fong.chee@intel.com> Message-ID: <1542967824.10129.39.camel@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On Wed, 2018-11-21 at 15:22 +0100, Marek Vasut wrote: > On 11/21/2018 11:41 AM, tien.fong.chee at intel.com wrote: > > > > From: Tien Fong Chee > Again, not your patch, please don't change authorship. > > http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=commit;h=eb32e56886 > 9b5f91fe34efb2642875a8da5f0ebd > > > > > Set default DT blob address on A10 SoCDK, since this SoC uses OF > > separate configuration. The 0xf0000 address is just below the text > > base and still leaves enough room for the DT to grow. > Why is this needed ? This patch i also cherry picked from sdmmc_next custodian. I think you put this for FIT implementation? I saw there is load property "0xf00000" defined for fdt in .its. > > > > > Signed-off-by: Marek Vasut > > Signed-off-by: Tien Fong Chee > > --- > >  arch/arm/mach-socfpga/board.c |    8 ++++++++ > >  1 files changed, 8 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach- > > socfpga/board.c > > index 7c8c05c..436a8a8 100644 > > --- a/arch/arm/mach-socfpga/board.c > > +++ b/arch/arm/mach-socfpga/board.c > > @@ -86,3 +86,11 @@ int g_dnl_board_usb_cable_connected(void) > >   return 1; > >  } > >  #endif > > + > > +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) && \ > > +!defined(CONFIG_SPL_BUILD) && defined(CONFIG_OF_SEPARATE) > > +void *board_fdt_blob_setup(void) > > +{ > > + return (void *)0xf00000; > > +} > > +#endif > > >