From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chee, Tien Fong Date: Thu, 3 Jan 2019 04:51:35 +0000 Subject: [U-Boot] [PATCH 2/6] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading In-Reply-To: <84afe647-042c-4f55-4220-1db6a6f3e219@denx.de> References: <1546157627-45489-1-git-send-email-tien.fong.chee@intel.com> <1546157627-45489-3-git-send-email-tien.fong.chee@intel.com> <9c45e911-d413-8d1a-9839-e7b1ad510d06@denx.de> <1546313290.10462.25.camel@intel.com> <84afe647-042c-4f55-4220-1db6a6f3e219@denx.de> Message-ID: <1546491095.10047.0.camel@intel.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, 2019-01-01 at 21:27 +0100, Marek Vasut wrote: > On 1/1/19 4:28 AM, Chee, Tien Fong wrote: > > > > On Sun, 2018-12-30 at 16:45 +0100, Marek Vasut wrote: > > > > > > On 12/30/18 9:13 AM, tien.fong.chee at intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee > > > > > > > > Add FPGA driver to support program FPGA with FPGA bitstream > > > > loading > > > > from > > > > filesystem. The driver are designed based on generic firmware > > > > loader > > > > framework. The driver can handle FPGA program operation from > > > > loading FPGA > > > > bitstream in flash to memory and then to program FPGA. > > > > > > > > Signed-off-by: Tien Fong Chee > > > What changed from V5 in each of those patches ? > > > > > I assume you are saying the v5 i had submmited in 2017. > > > > The major changes i have made are: > > 1. Stripping of the "fpga loadfs" command support layer on U-Boot > > console because the DDR would be corrupted if FPGA is reprogrammed. > > 2. Minor restructure and codes clean up such as understandable name > > for > > functions. > > 3. Using finalized generic firmware loader interface in this > > driver. > This should be in the changelog. Okay. >