[U-Boot] [PATCH 6/6] ARM: socfpga: Synchronize the configuration for A10 SoCDK

Marek Vasut
2019-01-01T20:35:45Z

On 1/1/19 4:51 AM, Chee, Tien Fong wrote:
> On Sun, 2018-12-30 at 16:54 +0100, Marek Vasut wrote:
>> On 12/30/18 9:13 AM, tien.fong.chee at intel.com wrote:
>>>
>>> From: Marek Vasut <marex@denx.de>
>>>
>>> Update the default configuration file to enable the necessary
>>> functionality
>>> the get the kit working. That includes SPL SD/MMC support, USB, and
>>> I2C.
>>>
>>> Signed-off-by: Marek Vasut <marex@denx.de>
>>> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
>> Is this patch needed ? Why ? This enables a whole lot of stuff ....
> These settings are mostly syn up from gen5 and our own downstream A10.
> These settings are mostly required to boot U-Boot and supporting A10
> golden system reference design.

Hmmm, mind you, all the MTD and SPI stuff is not needed for the SDMMC
configuration of the kit, which this patch would imply is the target.
You want to split this into smaller config changes which enable logical
blocks, not everything at once, and document why is each thing needed.

>>>
>>> ---
>>>  configs/socfpga_arria10_defconfig |   38
>>> +++++++++++++++++++++++++++++++-----
>>>  1 files changed, 32 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/configs/socfpga_arria10_defconfig
>>> b/configs/socfpga_arria10_defconfig
>>> index 8158dbb..4b93321 100644
>>> --- a/configs/socfpga_arria10_defconfig
>>> +++ b/configs/socfpga_arria10_defconfig
>>> @@ -1,7 +1,7 @@
>>>  CONFIG_ARM=y
>>>  CONFIG_ARCH_SOCFPGA=y
>>>  CONFIG_SYS_TEXT_BASE=0x01000040
>>> -CONFIG_SYS_MALLOC_F_LEN=0x2000
>>> +CONFIG_SYS_MALLOC_F_LEN=0x8000

Why is this increase in malloc area needed ?

>>>  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
>>>  CONFIG_SPL=y
>>>  CONFIG_IDENT_STRING="socfpga_arria10"
>>> @@ -10,26 +10,35 @@ CONFIG_NR_DRAM_BANKS=1
>>>  CONFIG_USE_BOOTARGS=y
>>>  CONFIG_BOOTARGS="console=ttyS0,115200"
>>>  # CONFIG_USE_BOOTCOMMAND is not set
>>> +CONFIG_SYS_CONSOLE_IS_IN_ENV=y
>>> +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
>>> +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
>>>  CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
>>> +CONFIG_VERSION_VARIABLE=y
>>>  CONFIG_DISPLAY_BOARDINFO_LATE=y
>>> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800
>>>  CONFIG_SPL_FPGA_SUPPORT=y
>>> -CONFIG_SPL_SPI_LOAD=y
>>>  CONFIG_CMD_ASKENV=y
>>>  CONFIG_CMD_GREPENV=y
>>> +CONFIG_CMD_DFU=y
>>>  # CONFIG_CMD_FLASH is not set
>>>  CONFIG_CMD_GPIO=y
>>> +CONFIG_CMD_I2C=y
>>>  CONFIG_CMD_MMC=y
>>> +CONFIG_CMD_SF=y
>>> +CONFIG_CMD_SPI=y
>>> +CONFIG_CMD_USB=y
>>> +CONFIG_CMD_USB_MASS_STORAGE=y
>>>  CONFIG_CMD_CACHE=y
>>>  CONFIG_CMD_EXT4_WRITE=y
>>>  CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
>>> -# CONFIG_SPL_DOS_PARTITION is not set
>>> -# CONFIG_ISO_PARTITION is not set
>>> -# CONFIG_EFI_PARTITION is not set
>>> +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-
>>> names"
>>>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
>>>  CONFIG_ENV_IS_IN_MMC=y
>>>  CONFIG_SPL_ENV_SUPPORT=y
>>>  CONFIG_SPL_DM=y
>>>  CONFIG_SPL_DM_SEQ_ALIAS=y
>>> +CONFIG_DFU_MMC=y
>>>  CONFIG_SPL_DM_MMC=y
>>>  CONFIG_SPL_MMC_SUPPORT=y
>>>  CONFIG_SPL_EXT_SUPPORT=y
>>> @@ -40,13 +49,30 @@ CONFIG_FS_LOADER=y
>>>  CONFIG_FPGA_SOCFPGA=y
>>>  CONFIG_DM_GPIO=y
>>>  CONFIG_DWAPB_GPIO=y
>>> +CONFIG_SYS_I2C_DW=y
>>>  CONFIG_DM_MMC=y
>>>  CONFIG_MTD_DEVICE=y
>>> +CONFIG_MTD_PARTITIONS=y
>>> +CONFIG_MMC_DW=y
>>> +CONFIG_SPI_FLASH=y
>>> +CONFIG_SPI_FLASH_BAR=y
>>> +CONFIG_SPI_FLASH_SPANSION=y
>>> +CONFIG_SPI_FLASH_STMICRO=y
>>> +CONFIG_PHY_MICREL=y
>>> +CONFIG_PHY_MICREL_KSZ90X1=y
>>>  CONFIG_DM_ETH=y
>>>  CONFIG_ETH_DESIGNWARE=y
>>>  CONFIG_MII=y
>>> +CONFIG_SYS_NS16550=y
>>>  CONFIG_SPI=y
>>>  CONFIG_TIMER=y
>>>  CONFIG_SPL_TIMER=y
>>>  CONFIG_DESIGNWARE_APB_TIMER=y
>>> -CONFIG_USE_TINY_PRINTF=y
>>> +CONFIG_DESIGNWARE_SPI=y
>>> +CONFIG_USB=y
>>> +CONFIG_DM_USB=y
>>> +CONFIG_USB_DWC2=y
>>> +CONFIG_USB_STORAGE=y
>>> +CONFIG_USB_GADGET=y
>>> +CONFIG_USB_GADGET_DWC2_OTG=y
>>> +CONFIG_USB_GADGET_DOWNLOAD=y

USB and DFU could be enabled separately.

--
Best regards,
Marek Vasut