From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chee, Tien Fong <tien.fong.chee@intel.com>
Date: Fri, 4 Jan 2019 03:10:52 +0000
Subject: [U-Boot] [PATCH 1/6] ARM: socfpga: Description on FPGA
 bitstream type and file name for Arria 10
In-Reply-To: <0286cc5a-74fb-a687-dfdd-d7dc95b4c120@denx.de>
References: <1546157627-45489-1-git-send-email-tien.fong.chee@intel.com>
 <1546157627-45489-2-git-send-email-tien.fong.chee@intel.com>
 <1c78575e-c4f6-c920-17f2-c04dcd2cc13f@denx.de>
 <1546312208.10462.16.camel@intel.com>
 <fd4e4971-b373-6626-41bb-fd50bb77ce64@denx.de>
 <1546492024.10047.12.camel@intel.com>
 <92bbc911-1794-ad9f-8b5b-5b275faf6246@denx.de>
 <1546500493.9838.3.camel@intel.com>
 <c96485fb-e273-fee7-7798-20d4c9d15713@denx.de>
 <1546562775.10624.4.camel@intel.com>
 <837bcef6-a9ea-098f-4739-8983108f893d@denx.de>
 <1546568567.9763.1.camel@intel.com>
 <0286cc5a-74fb-a687-dfdd-d7dc95b4c120@denx.de>
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On Fri, 2019-01-04 at 03:24 +0100, Marek Vasut wrote:
> On 1/4/19 3:22 AM, Chee, Tien Fong wrote:
> > 
> > On Fri, 2019-01-04 at 03:10 +0100, Marek Vasut wrote:
> > > 
> > > On 1/4/19 1:46 AM, Chee, Tien Fong wrote:
> > > [...]
> > > 
> > > > 
> > > > 
> > > > > 
> > > > > 
> > > > > > 
> > > > > > 
> > > > > > 2. What you means with partial loading? partial loading for
> > > > > > periph.rbf
> > > > > > or core.rbf or both rbfs?
> > > > > That you can only load the relevant image from the fitImage,
> > > > > not
> > > > > the
> > > > > entire fitImage, which lets you load the core bitstream in
> > > > > SPL.
> > > > So, you want 2 files periph.rbf.mkimage, and fitImage(contains
> > > > core.rbf) or both periph.rbf and core.rbf in one fitImage?
> > > Does it make sense ?
> > Which one you refer, 1 or 2?
> > 1. Two files => periph.rbf.mkimage, and fitImage(contains core.rbf)
> > in
> > FAT partition
> > 2. Both periph.rbf and core.rbf in one fitImage in FAT partition
> One fitImage file containing both .rbf files , stored in whatever
> storage the user needs.
Okay, let me explore feasibility of this kind implementation.
>