From: Patrick Delaunay <patrick.delaunay@st.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/7] clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR
Date: Wed, 30 Jan 2019 13:07:02 +0100 [thread overview]
Message-ID: <1548850026-31746-4-git-send-email-patrick.delaunay@st.com> (raw)
In-Reply-To: <1548850026-31746-1-git-send-email-patrick.delaunay@st.com>
Remove unnecessary setbits on set/clear registers.
Avoid to deactivate HSI with HSE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---
drivers/clk/clk_stm32mp1.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index e1477a1..5f2b2f1 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -1182,10 +1182,7 @@ static void stm32mp1_ls_osc_set(int enable, fdt_addr_t rcc, u32 offset,
static void stm32mp1_hs_ocs_set(int enable, fdt_addr_t rcc, u32 mask_on)
{
- if (enable)
- setbits_le32(rcc + RCC_OCENSETR, mask_on);
- else
- setbits_le32(rcc + RCC_OCENCLRR, mask_on);
+ writel(mask_on, rcc + (enable ? RCC_OCENSETR : RCC_OCENCLRR));
}
static int stm32mp1_osc_wait(int enable, fdt_addr_t rcc, u32 offset,
@@ -1256,20 +1253,20 @@ static void stm32mp1_lsi_set(fdt_addr_t rcc, int enable)
static void stm32mp1_hse_enable(fdt_addr_t rcc, int bypass, int digbyp, int css)
{
if (digbyp)
- setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_DIGBYP);
+ writel(RCC_OCENR_DIGBYP, rcc + RCC_OCENSETR);
if (bypass || digbyp)
- setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_HSEBYP);
+ writel(RCC_OCENR_HSEBYP, rcc + RCC_OCENSETR);
stm32mp1_hs_ocs_set(1, rcc, RCC_OCENR_HSEON);
stm32mp1_osc_wait(1, rcc, RCC_OCRDYR, RCC_OCRDYR_HSERDY);
if (css)
- setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_HSECSSON);
+ writel(RCC_OCENR_HSECSSON, rcc + RCC_OCENSETR);
}
static void stm32mp1_csi_set(fdt_addr_t rcc, int enable)
{
- stm32mp1_ls_osc_set(enable, rcc, RCC_OCENSETR, RCC_OCENR_CSION);
+ stm32mp1_hs_ocs_set(enable, rcc, RCC_OCENR_CSION);
stm32mp1_osc_wait(enable, rcc, RCC_OCRDYR, RCC_OCRDYR_CSIRDY);
}
--
2.7.4
next prev parent reply other threads:[~2019-01-30 12:07 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-30 12:06 [U-Boot] [PATCH 0/7] stm32mp1: update clock driver Patrick Delaunay
2019-01-30 12:07 ` [U-Boot] [PATCH 1/7] clk: stm32mp1: no more get ck_usbo_48m in device tree Patrick Delaunay
2019-02-10 13:08 ` [U-Boot] [U-Boot, " Tom Rini
2019-01-30 12:07 ` [U-Boot] [PATCH 2/7] clk: stm32mp1: add IPCC clock Patrick Delaunay
2019-02-10 13:08 ` [U-Boot] [U-Boot,2/7] " Tom Rini
2019-01-30 12:07 ` Patrick Delaunay [this message]
2019-02-10 13:09 ` [U-Boot] [U-Boot, 3/7] clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR Tom Rini
2019-02-10 13:09 ` Tom Rini
2019-01-30 12:07 ` [U-Boot] [PATCH 4/7] clk: stm32mp1: recalculate counter when switching freq Patrick Delaunay
2019-02-10 13:09 ` [U-Boot] [U-Boot, " Tom Rini
2019-01-30 12:07 ` [U-Boot] [PATCH 5/7] clk: stm32mp1: add debug information Patrick Delaunay
2019-02-10 13:09 ` [U-Boot] [U-Boot,5/7] " Tom Rini
2019-01-30 12:07 ` [U-Boot] [PATCH 6/7] dts: stm32mp1: clock tree update Patrick Delaunay
2019-02-10 13:09 ` [U-Boot] [U-Boot,6/7] " Tom Rini
2019-01-30 12:07 ` [U-Boot] [PATCH 7/7] clk: stm32mp1: correctly handle Clock Spreading Generator Patrick Delaunay
2019-02-10 13:09 ` [U-Boot] [U-Boot, " Tom Rini
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