From mboxrd@z Thu Jan 1 00:00:00 1970 From: Patrick Delaunay Date: Wed, 30 Jan 2019 13:07:03 +0100 Subject: [U-Boot] [PATCH 4/7] clk: stm32mp1: recalculate counter when switching freq In-Reply-To: <1548850026-31746-1-git-send-email-patrick.delaunay@st.com> References: <1548850026-31746-1-git-send-email-patrick.delaunay@st.com> Message-ID: <1548850026-31746-5-git-send-email-patrick.delaunay@st.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Because stgen is initialized with HSI clock, we need to recalculate the counter when changing frequency. Signed-off-by: Lionel Debieve Signed-off-by: Patrick Delaunay --- drivers/clk/clk_stm32mp1.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 5f2b2f1..ca98e0b 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -1471,10 +1471,15 @@ static void stgen_config(struct stm32mp1_clk_priv *priv) rate = stm32mp1_clk_get(priv, p); if (cntfid0 != rate) { + u64 counter; + pr_debug("System Generic Counter (STGEN) update\n"); clrbits_le32(stgenc + STGENC_CNTCR, STGENC_CNTCR_EN); - writel(0x0, stgenc + STGENC_CNTCVL); - writel(0x0, stgenc + STGENC_CNTCVU); + counter = (u64)readl(stgenc + STGENC_CNTCVL); + counter |= ((u64)(readl(stgenc + STGENC_CNTCVU))) << 32; + counter = lldiv(counter * (u64)rate, cntfid0); + writel((u32)counter, stgenc + STGENC_CNTCVL); + writel((u32)(counter >> 32), stgenc + STGENC_CNTCVU); writel(rate, stgenc + STGENC_CNTFID0); setbits_le32(stgenc + STGENC_CNTCR, STGENC_CNTCR_EN); -- 2.7.4