From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chee, Tien Fong <tien.fong.chee@intel.com>
Date: Tue, 12 Feb 2019 10:13:54 +0000
Subject: [U-Boot] [PATCH v7 1/7] ARM: socfpga: Description on FPGA
 bitstream type and file name for Arria 10
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On Tue, 2019-02-12 at 10:43 +0100, Marek Vasut wrote:
> On 2/12/19 10:35 AM, Chee, Tien Fong wrote:
> [...]
> 
> > 
> > > 
> > > my preference for the fit image would be
> > > 
> > > ...
> > > images {
> > >   fpga at 1 {
> > > 	description = "FPGA Periph";
> > > 	...
> > > 	type = "fpga_periph";
> > > 	...
> > >   }
> > >   fpga at 2 {
> > > 	description = "FPGA Core";
> > > 	...
> > > 	type = "fpga" or
> > > "fpga_core";
> > I'm good with "fpga".
> > > 
> > > 	...
> > >   }
> > > };
> > > configurations {
> > >   default = "config at 1"
> > >   config at 1 {
> > >       fpga = "fpga at 1";  // periph only
> > >   };
> > >   config at 2 {
> > >       fpga = "fpga at 1", "fpga at 2";
> > >   };
> > > };
> > > 
> > > with the expectation that the order of fpga at 1 and fpga at 2 in confi
> > > g at 2
> > > is not relevant.  the code should find the fpga_periph type and
> > > program
> > > it first.  just my comment, i dont like rellying on the order or
> > > name.
> > I can add support for above implementation although this adds more
> > complexity to the driver.
> You can have fpga node and e.g. fpga-name node in the configurations
> section to discern which phandle there is the core and which is the
> peripheral RBF. Would that work ?
> 
So something like that?

...

images {
  fpga-periph at 1 {
	description = "FPGA Periph";
	...
	type = "fpga_periph";
	...
  }
  fpga-core at 2 {
	description = "FPGA Core";
	...
	type = "fpga";
	...
  }
};
configurations {
  default = "config at 1"
  config at 1 {
      fpga = "fpga-periph at 1";  // periph only
  };
  config at 2 {
      fpga = "fpga-periph at 1", "fpga-core at 2";
  };
};

> > 
> > Marek, are you OK with this implementation?
> Looks OK to me. Dalon ?
> 
> [...]