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From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v8 4/8] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
Date: Thu, 14 Feb 2019 12:14:19 +0000	[thread overview]
Message-ID: <1550146458.10728.73.camel@intel.com> (raw)
In-Reply-To: <32cdc5b8-7da8-844a-4e96-ef90bd1cb745@denx.de>

On Thu, 2019-02-14 at 11:41 +0100, Marek Vasut wrote:
> On 2/14/19 7:44 AM, Chee, Tien Fong wrote:
> > 
> > On Wed, 2019-02-13 at 17:20 +0100, Marek Vasut wrote:
> > > 
> > > On 2/13/19 3:18 PM, tien.fong.chee at intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > 
> > > > Add FPGA driver to support program FPGA with FPGA bitstream
> > > > loading
> > > > from
> > > > filesystem. The driver are designed based on generic firmware
> > > > loader
> > > > framework. The driver can handle FPGA program operation from
> > > > loading FPGA
> > > > bitstream in flash to memory and then to program FPGA.
> > > > 
> > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > 
> > > > ---
> > > > 
> > > > changes for v8
> > > > - Added codes to discern bitstream type based on fpga node
> > > > name.
> > > > 
> > > > changes for v7
> > > > - Restructure the FPGA driver to support both peripheral
> > > > bitstream
> > > > and core
> > > >   bitstream bundled into FIT image.
> > > > - Support loadable property for core bitstream. User can set
> > > > loadable
> > > >   in DDR for better performance. This loading would be done in
> > > > one
> > > > large
> > > >   chunk instead of chunk by chunk loading with small memory
> > > > buffer.
> > > > ---
> > > >  arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts       |  17 +
> > > >  .../include/mach/fpga_manager_arria10.h            |  39 +-
> > > >  drivers/fpga/socfpga_arria10.c                     | 467
> > > > ++++++++++++++++++++-
> > > >  3 files changed, 500 insertions(+), 23 deletions(-)
> > > > 
> > > > diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > > > b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > > > index 998d811..14f1967 100644
> > > > --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > > > +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
[...]

> > > > - * FPGA Manager to program the FPGA. This is the interface
> > > > used by
> > > > FPGA driver.
> > > > - * Return 0 for sucess, non-zero for error.
> > > > - */
> > > > +char *get_fpga_filename(const void *fdt, int *len)
> > > > +{
> > > > +	char *fpga_filename = NULL;
> > > > +	int node_offset;
> > > > +
> > > > +	fdtdec_find_aliases_for_id(gd->fdt_blob, "fpga_mgr",
> > > > +				COMPAT_ALTERA_SOCFPGA_FPGA0,
> > > > +				&node_offset, 1);
> > > > +
> > > > +	ofnode fpgamgr_node = offset_to_ofnode(node_offset);
> > > > +
> > > > +	if (ofnode_valid(fpgamgr_node))
> > > > +		fpga_filename = (char
> > > > *)ofnode_read_string(fpgamgr_node,
> > > > +						"altr,bitstrea
> > > > m");
> > > > +
> > > > +
> > > Why is the cast needed ?
> > The return string would be eventually set to the char *filename in
> > common struct fpga_fsinfo. So, the cast here is to avoid the
> > warning
> > from compiler.
> I presume if the compiler generates a warning, it's for a reason.
> What
> warning is that ?
drivers/fpga/socfpga_arria10.c: In function 'get_fpga_filename':
drivers/fpga/socfpga_arria10.c:466:17: warning: assignment discards
'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
   fpga_filename = ofnode_read_string(fpgamgr_node,
> 

[...]

  parent reply	other threads:[~2019-02-14 12:14 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-13 14:18 [U-Boot] [PATCH v8 0/8] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-02-13 14:18 ` [U-Boot] [PATCH v8 1/8] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2019-02-13 16:07   ` Marek Vasut
2019-02-14  5:55     ` Chee, Tien Fong
2019-02-14 10:34       ` Marek Vasut
2019-02-14 11:03         ` Chee, Tien Fong
2019-02-13 14:18 ` [U-Boot] [PATCH v8 2/8] ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK tien.fong.chee at intel.com
2019-02-13 16:10   ` Marek Vasut
2019-02-13 22:45     ` Dalon L Westergreen
2019-02-13 23:04       ` Marek Vasut
2019-02-14  6:04         ` Chee, Tien Fong
2019-02-14 10:35           ` Marek Vasut
2019-02-14 11:23             ` Chee, Tien Fong
2019-02-14 12:24               ` Marek Vasut
2019-02-14 15:11                 ` Chee, Tien Fong
2019-02-14 15:13                   ` Marek Vasut
2019-02-14 15:47                     ` Chee, Tien Fong
2019-02-14 16:26                       ` Marek Vasut
2019-02-14 17:37                         ` Chee, Tien Fong
2019-02-15  8:35                         ` Chee, Tien Fong
2019-02-13 14:18 ` [U-Boot] [PATCH v8 3/8] fit: Add function declarations to the header file tien.fong.chee at intel.com
2019-02-13 16:11   ` Marek Vasut
2019-02-14  6:05     ` Chee, Tien Fong
2019-02-14 11:51     ` Chee, Tien Fong
2019-02-14 12:28       ` Marek Vasut
2019-02-14 15:12         ` Chee, Tien Fong
2019-02-13 14:18 ` [U-Boot] [PATCH v8 4/8] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2019-02-13 16:20   ` Marek Vasut
2019-02-14  6:44     ` Chee, Tien Fong
2019-02-14 10:41       ` Marek Vasut
2019-02-14 11:35         ` Chee, Tien Fong
2019-02-14 12:14         ` Chee, Tien Fong [this message]
2019-02-14 12:29           ` Marek Vasut
2019-02-14 15:14             ` Chee, Tien Fong
2019-02-14 15:15               ` Marek Vasut
2019-02-14 15:23                 ` Chee, Tien Fong
2019-02-14 15:24                   ` Marek Vasut
2019-02-13 14:18 ` [U-Boot] [PATCH v8 5/8] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK tien.fong.chee at intel.com
2019-02-13 14:18 ` [U-Boot] [PATCH v8 6/8] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2019-02-13 16:25   ` Marek Vasut
2019-02-14  6:50     ` Chee, Tien Fong
2019-02-14 10:42       ` Marek Vasut
2019-02-14 11:38         ` Chee, Tien Fong
2019-02-14 12:28           ` Marek Vasut
2019-02-14 15:15             ` Chee, Tien Fong
2019-02-14 15:21               ` Marek Vasut
2019-02-14 15:37                 ` Chee, Tien Fong
2019-02-14 16:27                   ` Marek Vasut
2019-02-14 17:30                     ` Chee, Tien Fong
2019-02-14 16:33               ` Westergreen, Dalon
2019-02-14 16:59                 ` Chee, Tien Fong
2019-02-14 17:26                   ` Westergreen, Dalon
2019-02-14 17:26                 ` Chee, Tien Fong
2019-02-13 14:18 ` [U-Boot] [PATCH v8 7/8] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com
2019-02-13 14:18 ` [U-Boot] [PATCH v8 8/8] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL tien.fong.chee at intel.com

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