From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chee, Tien Fong <tien.fong.chee@intel.com>
Date: Thu, 7 Mar 2019 08:14:56 +0000
Subject: [U-Boot] [PATCH v11 8/9] ARM: socfpga: Synchronize the
 configuration for A10 SoCDK
In-Reply-To: <d534b520-836e-f643-9d25-20d018db83cb@kernel.org>
References: <20190305162310.1396-1-tien.fong.chee@intel.com>
 <20190305162310.1396-9-tien.fong.chee@intel.com>
 <d534b520-836e-f643-9d25-20d018db83cb@kernel.org>
Message-ID: <1551946495.9744.29.camel@intel.com>
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To: u-boot@lists.denx.de

On Tue, 2019-03-05 at 22:54 -0600, Dinh Nguyen wrote:
> 
> On 3/5/19 10:23 AM, tien.fong.chee at intel.com wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > 
> > Update the default configuration file to enable the necessary
> > functionality
> > the get the kit working.
> > 
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > 
> > ---
> > 
> > changes for v8
> > - Moved the FIT related configs to the patch of configuration for
> > FPGA
> >   SoCFPGA A10 SoCDK.
> > 
> > changes for v7
> > - Keep minimal configs.
> > ---
> >  configs/socfpga_arria10_defconfig | 15 +++++++++------
> >  1 file changed, 9 insertions(+), 6 deletions(-)
> Why are there 2 patches touching socfpga_arria10_defconfig in this
> series? Can you squash them into 1?

Marek want clear description for each CONFIG added into the defconfig.
So, 1st defconfig is about enabling fpga driver, and 2nd for enabling
complete boot.