* [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver
@ 2019-03-06 21:05 Marek Vasut
2019-03-06 21:05 ` [U-Boot] [PATCH 2/2] ddr: socfpga: Fix newline in debug print on A10 Marek Vasut
2019-03-07 8:14 ` [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver Simon Goldschmidt
0 siblings, 2 replies; 6+ messages in thread
From: Marek Vasut @ 2019-03-06 21:05 UTC (permalink / raw)
To: u-boot
The Altera Arria10 DDR driver was using constants in a few places
instead of reading registers associated with those constants, fix
this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
---
drivers/ddr/altera/sdram_arria10.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
index 29ea7492f3..6724eb29f1 100644
--- a/drivers/ddr/altera/sdram_arria10.c
+++ b/drivers/ddr/altera/sdram_arria10.c
@@ -304,7 +304,7 @@ static void sdram_mmr_init(void)
* bit[9:6] = Minor Release #
* bit[14:10] = Major Release #
*/
- if ((socfpga_io48_mmr_base->niosreserve1 >> 6) & 0x1FF) {
+ if ((readl(&socfpga_io48_mmr_base->niosreserve1) >> 6) & 0x1FF) {
update_value = readl(&socfpga_io48_mmr_base->niosreserve0);
writel(((update_value & 0xFF) >> 5),
&socfpga_ecc_hmc_base->ddrioctrl);
@@ -394,7 +394,7 @@ static void sdram_mmr_init(void)
caltim0_cfg_act_to_rdwr -
(ctrlcfg0_cfg_ctrl_burst_len >> 2));
- io48_value = ((((socfpga_io48_mmr_base->dramtiming0 &
+ io48_value = ((((readl(&socfpga_io48_mmr_base->dramtiming0) &
ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) + 2 + 15 +
(ctrlcfg0_cfg_ctrl_burst_len >> 1)) >> 1) -
/* Up to here was in memory cycles so divide by 2 */
@@ -424,7 +424,7 @@ static void sdram_mmr_init(void)
&socfpga_noc_ddr_scheduler_base->ddr_t_main_scheduler_ddrmode);
/* Configure the read latency [0xFFD12414] */
- writel(((socfpga_io48_mmr_base->dramtiming0 &
+ writel(((readl(&socfpga_io48_mmr_base->dramtiming0) &
ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) >> 1) +
DDR_READ_LATENCY_DELAY,
&socfpga_noc_ddr_scheduler_base->
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [U-Boot] [PATCH 2/2] ddr: socfpga: Fix newline in debug print on A10
2019-03-06 21:05 [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver Marek Vasut
@ 2019-03-06 21:05 ` Marek Vasut
2019-03-07 8:13 ` Simon Goldschmidt
2019-03-07 8:14 ` [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver Simon Goldschmidt
1 sibling, 1 reply; 6+ messages in thread
From: Marek Vasut @ 2019-03-06 21:05 UTC (permalink / raw)
To: u-boot
The debug print is missing a newline, add it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
---
drivers/ddr/altera/sdram_arria10.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
index 6724eb29f1..be5ce778e8 100644
--- a/drivers/ddr/altera/sdram_arria10.c
+++ b/drivers/ddr/altera/sdram_arria10.c
@@ -270,7 +270,7 @@ static u64 sdram_size_calc(void)
size *= (2 << (readl(&socfpga_ecc_hmc_base->ddrioctrl) &
ALT_ECC_HMC_OCP_DDRIOCTRL_IO_SIZE_MSK));
- debug("SDRAM size=%llu", size);
+ debug("SDRAM size=%llu\n", size);
return size;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* [U-Boot] [PATCH 2/2] ddr: socfpga: Fix newline in debug print on A10
2019-03-06 21:05 ` [U-Boot] [PATCH 2/2] ddr: socfpga: Fix newline in debug print on A10 Marek Vasut
@ 2019-03-07 8:13 ` Simon Goldschmidt
2019-03-07 13:58 ` Chee, Tien Fong
0 siblings, 1 reply; 6+ messages in thread
From: Simon Goldschmidt @ 2019-03-07 8:13 UTC (permalink / raw)
To: u-boot
On Wed, Mar 6, 2019 at 10:05 PM Marek Vasut <marex@denx.de> wrote:
>
> The debug print is missing a newline, add it.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <chin.liang.see@intel.com>
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> ---
> drivers/ddr/altera/sdram_arria10.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
> index 6724eb29f1..be5ce778e8 100644
> --- a/drivers/ddr/altera/sdram_arria10.c
> +++ b/drivers/ddr/altera/sdram_arria10.c
> @@ -270,7 +270,7 @@ static u64 sdram_size_calc(void)
> size *= (2 << (readl(&socfpga_ecc_hmc_base->ddrioctrl) &
> ALT_ECC_HMC_OCP_DDRIOCTRL_IO_SIZE_MSK));
>
> - debug("SDRAM size=%llu", size);
> + debug("SDRAM size=%llu\n", size);
>
> return size;
> }
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread* [U-Boot] [PATCH 2/2] ddr: socfpga: Fix newline in debug print on A10
2019-03-07 8:13 ` Simon Goldschmidt
@ 2019-03-07 13:58 ` Chee, Tien Fong
0 siblings, 0 replies; 6+ messages in thread
From: Chee, Tien Fong @ 2019-03-07 13:58 UTC (permalink / raw)
To: u-boot
On Thu, 2019-03-07 at 09:13 +0100, Simon Goldschmidt wrote:
> On Wed, Mar 6, 2019 at 10:05 PM Marek Vasut <marex@denx.de> wrote:
> >
> >
> > The debug print is missing a newline, add it.
> >
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <chin.liang.see@intel.com>
> > Cc: Dinh Nguyen <dinguyen@kernel.org>
> > Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> > Cc: Tien Fong Chee <tien.fong.chee@intel.com>
> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
>
> >
> > ---
> > drivers/ddr/altera/sdram_arria10.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/ddr/altera/sdram_arria10.c
> > b/drivers/ddr/altera/sdram_arria10.c
> > index 6724eb29f1..be5ce778e8 100644
> > --- a/drivers/ddr/altera/sdram_arria10.c
> > +++ b/drivers/ddr/altera/sdram_arria10.c
> > @@ -270,7 +270,7 @@ static u64 sdram_size_calc(void)
> > size *= (2 << (readl(&socfpga_ecc_hmc_base->ddrioctrl) &
> > ALT_ECC_HMC_OCP_DDRIOCTRL_IO_SIZE_MSK));
> >
> > - debug("SDRAM size=%llu", size);
> > + debug("SDRAM size=%llu\n", size);
> >
> > return size;
> > }
> > --
> > 2.20.1
> >
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver
2019-03-06 21:05 [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver Marek Vasut
2019-03-06 21:05 ` [U-Boot] [PATCH 2/2] ddr: socfpga: Fix newline in debug print on A10 Marek Vasut
@ 2019-03-07 8:14 ` Simon Goldschmidt
2019-03-07 13:55 ` Chee, Tien Fong
1 sibling, 1 reply; 6+ messages in thread
From: Simon Goldschmidt @ 2019-03-07 8:14 UTC (permalink / raw)
To: u-boot
On Wed, Mar 6, 2019 at 10:05 PM Marek Vasut <marex@denx.de> wrote:
>
> The Altera Arria10 DDR driver was using constants in a few places
> instead of reading registers associated with those constants, fix
> this.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <chin.liang.see@intel.com>
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> ---
> drivers/ddr/altera/sdram_arria10.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
> index 29ea7492f3..6724eb29f1 100644
> --- a/drivers/ddr/altera/sdram_arria10.c
> +++ b/drivers/ddr/altera/sdram_arria10.c
> @@ -304,7 +304,7 @@ static void sdram_mmr_init(void)
> * bit[9:6] = Minor Release #
> * bit[14:10] = Major Release #
> */
> - if ((socfpga_io48_mmr_base->niosreserve1 >> 6) & 0x1FF) {
> + if ((readl(&socfpga_io48_mmr_base->niosreserve1) >> 6) & 0x1FF) {
> update_value = readl(&socfpga_io48_mmr_base->niosreserve0);
> writel(((update_value & 0xFF) >> 5),
> &socfpga_ecc_hmc_base->ddrioctrl);
> @@ -394,7 +394,7 @@ static void sdram_mmr_init(void)
> caltim0_cfg_act_to_rdwr -
> (ctrlcfg0_cfg_ctrl_burst_len >> 2));
>
> - io48_value = ((((socfpga_io48_mmr_base->dramtiming0 &
> + io48_value = ((((readl(&socfpga_io48_mmr_base->dramtiming0) &
> ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) + 2 + 15 +
> (ctrlcfg0_cfg_ctrl_burst_len >> 1)) >> 1) -
> /* Up to here was in memory cycles so divide by 2 */
> @@ -424,7 +424,7 @@ static void sdram_mmr_init(void)
> &socfpga_noc_ddr_scheduler_base->ddr_t_main_scheduler_ddrmode);
>
> /* Configure the read latency [0xFFD12414] */
> - writel(((socfpga_io48_mmr_base->dramtiming0 &
> + writel(((readl(&socfpga_io48_mmr_base->dramtiming0) &
> ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) >> 1) +
> DDR_READ_LATENCY_DELAY,
> &socfpga_noc_ddr_scheduler_base->
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread* [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver
2019-03-07 8:14 ` [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver Simon Goldschmidt
@ 2019-03-07 13:55 ` Chee, Tien Fong
0 siblings, 0 replies; 6+ messages in thread
From: Chee, Tien Fong @ 2019-03-07 13:55 UTC (permalink / raw)
To: u-boot
On Thu, 2019-03-07 at 09:14 +0100, Simon Goldschmidt wrote:
> On Wed, Mar 6, 2019 at 10:05 PM Marek Vasut <marex@denx.de> wrote:
> >
> >
> > The Altera Arria10 DDR driver was using constants in a few places
> > instead of reading registers associated with those constants, fix
> > this.
> >
> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Chin Liang See <chin.liang.see@intel.com>
> > Cc: Dinh Nguyen <dinguyen@kernel.org>
> > Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> > Cc: Tien Fong Chee <tien.fong.chee@intel.com>
> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
>
> >
> > ---
> > drivers/ddr/altera/sdram_arria10.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/ddr/altera/sdram_arria10.c
> > b/drivers/ddr/altera/sdram_arria10.c
> > index 29ea7492f3..6724eb29f1 100644
> > --- a/drivers/ddr/altera/sdram_arria10.c
> > +++ b/drivers/ddr/altera/sdram_arria10.c
> > @@ -304,7 +304,7 @@ static void sdram_mmr_init(void)
> > * bit[9:6] = Minor Release #
> > * bit[14:10] = Major Release #
> > */
> > - if ((socfpga_io48_mmr_base->niosreserve1 >> 6) & 0x1FF) {
> > + if ((readl(&socfpga_io48_mmr_base->niosreserve1) >> 6) &
> > 0x1FF) {
> > update_value = readl(&socfpga_io48_mmr_base-
> > >niosreserve0);
> > writel(((update_value & 0xFF) >> 5),
> > &socfpga_ecc_hmc_base->ddrioctrl);
> > @@ -394,7 +394,7 @@ static void sdram_mmr_init(void)
> > caltim0_cfg_act_to_rdwr -
> > (ctrlcfg0_cfg_ctrl_burst_len >> 2));
> >
> > - io48_value = ((((socfpga_io48_mmr_base->dramtiming0 &
> > + io48_value = ((((readl(&socfpga_io48_mmr_base->dramtiming0)
> > &
> > ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) + 2
> > + 15 +
> > (ctrlcfg0_cfg_ctrl_burst_len >> 1)) >> 1) -
> > /* Up to here was in memory cycles so divide
> > by 2 */
> > @@ -424,7 +424,7 @@ static void sdram_mmr_init(void)
> > &socfpga_noc_ddr_scheduler_base-
> > >ddr_t_main_scheduler_ddrmode);
> >
> > /* Configure the read latency [0xFFD12414] */
> > - writel(((socfpga_io48_mmr_base->dramtiming0 &
> > + writel(((readl(&socfpga_io48_mmr_base->dramtiming0) &
> > ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) >> 1) +
> > DDR_READ_LATENCY_DELAY,
> > &socfpga_noc_ddr_scheduler_base->
> > --
> > 2.20.1
> >
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-03-07 13:58 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2019-03-06 21:05 [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver Marek Vasut
2019-03-06 21:05 ` [U-Boot] [PATCH 2/2] ddr: socfpga: Fix newline in debug print on A10 Marek Vasut
2019-03-07 8:13 ` Simon Goldschmidt
2019-03-07 13:58 ` Chee, Tien Fong
2019-03-07 8:14 ` [U-Boot] [PATCH 1/2] ddr: socfpga: Fix IO in Arria10 DDR driver Simon Goldschmidt
2019-03-07 13:55 ` Chee, Tien Fong
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