From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chee, Tien Fong <tien.fong.chee@intel.com>
Date: Mon, 18 Mar 2019 07:45:47 +0000
Subject: [U-Boot] [PATCH 6/6] arm: socfpga: a10: move SPL stack size to
	Kconfig
In-Reply-To: <20190311213524.15893-7-simon.k.r.goldschmidt@gmail.com>
References: <20190311213524.15893-1-simon.k.r.goldschmidt@gmail.com>
 <20190311213524.15893-7-simon.k.r.goldschmidt@gmail.com>
Message-ID: <1552895147.10282.2.camel@intel.com>
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To: u-boot@lists.denx.de

On Mon, 2019-03-11 at 22:35 +0100, Simon Goldschmidt wrote:
> Instead of fixing the SPL stack to 64 KiB in the board config header
> via
> CONFIG_SYS_SPL_MALLOC_SIZE, let's just use
> CONFIG_SPL_SYS_MALLOC_F_LEN
> in the defconfig.
> 
> This also has the advandage that it removes sub-mach specific ifdefs
> in
> socfpga_common.h.
> 
> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> ---
> 
> This patch was part of an socfpga series before. It didn't work there
> and
> was the reason for this series. It also serves as a demonstration of
> this
> series.
This patch breaking my series of A10 patches.

No SPL print out from the terminal console. I would help to debug in
later.

Thanks.
TF

> ---
>  configs/socfpga_arria10_defconfig |  1 +
>  include/configs/socfpga_common.h  | 14 --------------
>  2 files changed, 1 insertion(+), 14 deletions(-)
> 
> diff --git a/configs/socfpga_arria10_defconfig
> b/configs/socfpga_arria10_defconfig
> index f321a0ac3b..8d0479cc05 100644
> --- a/configs/socfpga_arria10_defconfig
> +++ b/configs/socfpga_arria10_defconfig
> @@ -2,6 +2,7 @@ CONFIG_ARM=y
>  CONFIG_ARCH_SOCFPGA=y
>  CONFIG_SYS_TEXT_BASE=0x01000040
>  CONFIG_SYS_MALLOC_F_LEN=0x2000
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
>  CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
>  CONFIG_SPL=y
>  CONFIG_IDENT_STRING="socfpga_arria10"
> diff --git a/include/configs/socfpga_common.h
> b/include/configs/socfpga_common.h
> index 181af9b646..16c83900c3 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -251,16 +251,6 @@ unsigned int
> cm_get_qspi_controller_clk_hz(void);
>  #define CONFIG_SPL_TEXT_BASE		CONFIG_SYS_INIT_RAM_ADDR
>  #define CONFIG_SPL_MAX_SIZE		CONFIG_SYS_INIT_RAM_SIZE
>  
> -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> -/* SPL memory allocation configuration, this is for FAT
> implementation */
> -#ifndef CONFIG_SYS_SPL_MALLOC_START
> -#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
> -#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_INIT_RAM_SIZE
> - \
> -					 CONFIG_SYS_SPL_MALLOC_SIZE
> + \
> -					 CONFIG_SYS_INIT_RAM_ADDR)
> -#endif
> -#endif
> -
>  /* SPL SDMMC boot support */
>  #ifdef CONFIG_SPL_MMC_SUPPORT
>  #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
> @@ -294,11 +284,7 @@ unsigned int
> cm_get_qspi_controller_clk_hz(void);
>  /*
>   * Stack setup
>   */
> -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  #define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
> -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> -#define CONFIG_SPL_STACK		CONFIG_SYS_SPL_MALLOC_START
> -#endif
>  
>  /* Extra Environment */
>  #ifndef CONFIG_SPL_BUILD