From: chee.hong.ang at intel.com <chee.hong.ang@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
Date: Fri, 3 May 2019 01:18:47 -0700 [thread overview]
Message-ID: <1556871527-17656-1-git-send-email-chee.hong.ang@intel.com> (raw)
From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
arch/arm/mach-socfpga/spl_s10.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
index e186296..3ac46c3 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
@@ -95,6 +95,7 @@ struct socfpga_reset_manager {
#define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
#define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
#define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
+#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
#define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
#define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
#define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
index a141ffe..e063229 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS, &sysmgr_regs->dma);
writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph);
+ /* enable DMA330 DMA */
+ socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
+ socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
+
spl_disable_firewall_l4_per();
spl_disable_firewall_l4_sys();
--
2.7.4
next reply other threads:[~2019-05-03 8:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-03 8:18 chee.hong.ang at intel.com [this message]
2019-05-03 9:55 ` [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller Marek Vasut
2019-05-03 15:53 ` Ang, Chee Hong
2019-05-03 17:04 ` Marek Vasut
2019-05-03 17:56 ` Ang, Chee Hong
2019-05-03 19:31 ` Marek Vasut
2019-05-07 3:28 ` Ang, Chee Hong
2019-05-07 3:39 ` Marek Vasut
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