* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
@ 2019-05-03 8:18 chee.hong.ang at intel.com
2019-05-03 9:55 ` Marek Vasut
0 siblings, 1 reply; 8+ messages in thread
From: chee.hong.ang at intel.com @ 2019-05-03 8:18 UTC (permalink / raw)
To: u-boot
From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
arch/arm/mach-socfpga/spl_s10.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
index e186296..3ac46c3 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
@@ -95,6 +95,7 @@ struct socfpga_reset_manager {
#define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
#define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
#define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
+#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
#define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
#define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
#define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
index a141ffe..e063229 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS, &sysmgr_regs->dma);
writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph);
+ /* enable DMA330 DMA */
+ socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
+ socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
+
spl_disable_firewall_l4_per();
spl_disable_firewall_l4_sys();
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
2019-05-03 8:18 [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller chee.hong.ang at intel.com
@ 2019-05-03 9:55 ` Marek Vasut
2019-05-03 15:53 ` Ang, Chee Hong
0 siblings, 1 reply; 8+ messages in thread
From: Marek Vasut @ 2019-05-03 9:55 UTC (permalink / raw)
To: u-boot
On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
Commit message is missing -- why do you need to enable the DMA330 ?
Don't you have a reset driver, like A10 and Gen5 ?
> Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
> ---
> arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
> arch/arm/mach-socfpga/spl_s10.c | 4 ++++
> 2 files changed, 5 insertions(+)
>
> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> index e186296..3ac46c3 100644
> --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> @@ -95,6 +95,7 @@ struct socfpga_reset_manager {
> #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
> #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
> #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
> +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
> #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
> #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
> #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
> index a141ffe..e063229 100644
> --- a/arch/arm/mach-socfpga/spl_s10.c
> +++ b/arch/arm/mach-socfpga/spl_s10.c
> @@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
> writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS, &sysmgr_regs->dma);
> writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph);
>
> + /* enable DMA330 DMA */
> + socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
> + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
> +
> spl_disable_firewall_l4_per();
>
> spl_disable_firewall_l4_sys();
>
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
2019-05-03 9:55 ` Marek Vasut
@ 2019-05-03 15:53 ` Ang, Chee Hong
2019-05-03 17:04 ` Marek Vasut
0 siblings, 1 reply; 8+ messages in thread
From: Ang, Chee Hong @ 2019-05-03 15:53 UTC (permalink / raw)
To: u-boot
On Fri, 2019-05-03 at 11:55 +0200, Marek Vasut wrote:
> On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
> >
> > From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
> Commit message is missing -- why do you need to enable the DMA330 ?
>
> Don't you have a reset driver, like A10 and Gen5 ?
DMA driver for S10 is still missing in u-boot. I need to enable this
for booting Linux which is required by Linux's DMA driver.
I will add the reason to enable DMA330 in the commit message.
>
> >
> > Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
> > ---
> > arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
> > arch/arm/mach-socfpga/spl_s10.c | 4 ++++
> > 2 files changed, 5 insertions(+)
> >
> > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > index e186296..3ac46c3 100644
> > --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > @@ -95,6 +95,7 @@ struct socfpga_reset_manager {
> > #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
> > #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
> > #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
> > +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
> > #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
> > #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
> > #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
> > diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-
> > socfpga/spl_s10.c
> > index a141ffe..e063229 100644
> > --- a/arch/arm/mach-socfpga/spl_s10.c
> > +++ b/arch/arm/mach-socfpga/spl_s10.c
> > @@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
> > writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
> > &sysmgr_regs->dma);
> > writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph);
> >
> > + /* enable DMA330 DMA */
> > + socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
> > + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
> > +
> > spl_disable_firewall_l4_per();
> >
> > spl_disable_firewall_l4_sys();
> >
>
^ permalink raw reply [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
2019-05-03 15:53 ` Ang, Chee Hong
@ 2019-05-03 17:04 ` Marek Vasut
2019-05-03 17:56 ` Ang, Chee Hong
0 siblings, 1 reply; 8+ messages in thread
From: Marek Vasut @ 2019-05-03 17:04 UTC (permalink / raw)
To: u-boot
On 5/3/19 5:53 PM, Ang, Chee Hong wrote:
> On Fri, 2019-05-03 at 11:55 +0200, Marek Vasut wrote:
>> On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
>>>
>>> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
>> Commit message is missing -- why do you need to enable the DMA330 ?
>>
>> Don't you have a reset driver, like A10 and Gen5 ?
> DMA driver for S10 is still missing in u-boot. I need to enable this
> for booting Linux which is required by Linux's DMA driver.
> I will add the reason to enable DMA330 in the commit message.
Can you also answer my question regarding the reset driver ?
>>> Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
>>> ---
>>> arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
>>> arch/arm/mach-socfpga/spl_s10.c | 4 ++++
>>> 2 files changed, 5 insertions(+)
>>>
>>> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>> b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>> index e186296..3ac46c3 100644
>>> --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>> @@ -95,6 +95,7 @@ struct socfpga_reset_manager {
>>> #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
>>> #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
>>> #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
>>> +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
>>> #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
>>> #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
>>> #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
>>> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-
>>> socfpga/spl_s10.c
>>> index a141ffe..e063229 100644
>>> --- a/arch/arm/mach-socfpga/spl_s10.c
>>> +++ b/arch/arm/mach-socfpga/spl_s10.c
>>> @@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
>>> writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
>>> &sysmgr_regs->dma);
>>> writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs->dma_periph);
>>>
>>> + /* enable DMA330 DMA */
>>> + socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
>>> + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
>>> +
>>> spl_disable_firewall_l4_per();
>>>
>>> spl_disable_firewall_l4_sys();
>>>
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
2019-05-03 17:04 ` Marek Vasut
@ 2019-05-03 17:56 ` Ang, Chee Hong
2019-05-03 19:31 ` Marek Vasut
0 siblings, 1 reply; 8+ messages in thread
From: Ang, Chee Hong @ 2019-05-03 17:56 UTC (permalink / raw)
To: u-boot
On Fri, 2019-05-03 at 19:04 +0200, Marek Vasut wrote:
> On 5/3/19 5:53 PM, Ang, Chee Hong wrote:
> >
> > On Fri, 2019-05-03 at 11:55 +0200, Marek Vasut wrote:
> > >
> > > On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
> > > >
> > > >
> > > > From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
> > > Commit message is missing -- why do you need to enable the DMA330
> > > ?
> > >
> > > Don't you have a reset driver, like A10 and Gen5 ?
> > DMA driver for S10 is still missing in u-boot. I need to enable
> > this
> > for booting Linux which is required by Linux's DMA driver.
> > I will add the reason to enable DMA330 in the commit message.
> Can you also answer my question regarding the reset driver ?
Yes. S10 has a reset driver in drivers/reset/reset-socfpga.c.
>
> >
> > >
> > > >
> > > > Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
> > > > ---
> > > > arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
> > > > arch/arm/mach-socfpga/spl_s10.c | 4
> > > > ++++
> > > > 2 files changed, 5 insertions(+)
> > > >
> > > > diff --git a/arch/arm/mach-
> > > > socfpga/include/mach/reset_manager_s10.h
> > > > b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > > > index e186296..3ac46c3 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > > > @@ -95,6 +95,7 @@ struct socfpga_reset_manager {
> > > > #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
> > > > #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
> > > > #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
> > > > +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
> > > > #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
> > > > #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
> > > > #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
> > > > diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-
> > > > socfpga/spl_s10.c
> > > > index a141ffe..e063229 100644
> > > > --- a/arch/arm/mach-socfpga/spl_s10.c
> > > > +++ b/arch/arm/mach-socfpga/spl_s10.c
> > > > @@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
> > > > writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
> > > > &sysmgr_regs->dma);
> > > > writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs-
> > > > >dma_periph);
> > > >
> > > > + /* enable DMA330 DMA */
> > > > + socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
> > > > + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
> > > > +
> > > > spl_disable_firewall_l4_per();
> > > >
> > > > spl_disable_firewall_l4_sys();
> > > >
>
^ permalink raw reply [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
2019-05-03 17:56 ` Ang, Chee Hong
@ 2019-05-03 19:31 ` Marek Vasut
2019-05-07 3:28 ` Ang, Chee Hong
0 siblings, 1 reply; 8+ messages in thread
From: Marek Vasut @ 2019-05-03 19:31 UTC (permalink / raw)
To: u-boot
On 5/3/19 7:56 PM, Ang, Chee Hong wrote:
> On Fri, 2019-05-03 at 19:04 +0200, Marek Vasut wrote:
>> On 5/3/19 5:53 PM, Ang, Chee Hong wrote:
>>>
>>> On Fri, 2019-05-03 at 11:55 +0200, Marek Vasut wrote:
>>>>
>>>> On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
>>>>>
>>>>>
>>>>> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
>>>> Commit message is missing -- why do you need to enable the DMA330
>>>> ?
>>>>
>>>> Don't you have a reset driver, like A10 and Gen5 ?
>>> DMA driver for S10 is still missing in u-boot. I need to enable
>>> this
>>> for booting Linux which is required by Linux's DMA driver.
>>> I will add the reason to enable DMA330 in the commit message.
>> Can you also answer my question regarding the reset driver ?
> Yes. S10 has a reset driver in drivers/reset/reset-socfpga.c.
So why don't you use it ? :-)
>>>>> Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
>>>>> ---
>>>>> arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
>>>>> arch/arm/mach-socfpga/spl_s10.c | 4
>>>>> ++++
>>>>> 2 files changed, 5 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/mach-
>>>>> socfpga/include/mach/reset_manager_s10.h
>>>>> b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>>>> index e186296..3ac46c3 100644
>>>>> --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>>>> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>>>> @@ -95,6 +95,7 @@ struct socfpga_reset_manager {
>>>>> #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
>>>>> #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
>>>>> #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
>>>>> +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
>>>>> #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
>>>>> #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
>>>>> #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
>>>>> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-
>>>>> socfpga/spl_s10.c
>>>>> index a141ffe..e063229 100644
>>>>> --- a/arch/arm/mach-socfpga/spl_s10.c
>>>>> +++ b/arch/arm/mach-socfpga/spl_s10.c
>>>>> @@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
>>>>> writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
>>>>> &sysmgr_regs->dma);
>>>>> writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs-
>>>>>> dma_periph);
>>>>>
>>>>> + /* enable DMA330 DMA */
>>>>> + socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
>>>>> + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
>>>>> +
>>>>> spl_disable_firewall_l4_per();
>>>>>
>>>>> spl_disable_firewall_l4_sys();
>>>>>
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
2019-05-03 19:31 ` Marek Vasut
@ 2019-05-07 3:28 ` Ang, Chee Hong
2019-05-07 3:39 ` Marek Vasut
0 siblings, 1 reply; 8+ messages in thread
From: Ang, Chee Hong @ 2019-05-07 3:28 UTC (permalink / raw)
To: u-boot
On Fri, 2019-05-03 at 21:31 +0200, Marek Vasut wrote:
> On 5/3/19 7:56 PM, Ang, Chee Hong wrote:
> >
> > On Fri, 2019-05-03 at 19:04 +0200, Marek Vasut wrote:
> > >
> > > On 5/3/19 5:53 PM, Ang, Chee Hong wrote:
> > > >
> > > >
> > > > On Fri, 2019-05-03 at 11:55 +0200, Marek Vasut wrote:
> > > > >
> > > > >
> > > > > On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
> > > > > Commit message is missing -- why do you need to enable the
> > > > > DMA330
> > > > > ?
> > > > >
> > > > > Don't you have a reset driver, like A10 and Gen5 ?
> > > > DMA driver for S10 is still missing in u-boot. I need to enable
> > > > this
> > > > for booting Linux which is required by Linux's DMA driver.
> > > > I will add the reason to enable DMA330 in the commit message.
> > > Can you also answer my question regarding the reset driver ?
> > Yes. S10 has a reset driver in drivers/reset/reset-socfpga.c.
> So why don't you use it ? :-)
Since our u-boot don't have DMA330 driver, I am going to drop this
patch and let Linux DMA driver take care of the reset. Thanks.
>
> >
> > >
> > > >
> > > > >
> > > > > >
> > > > > > Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
> > > > > > ---
> > > > > > arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1
> > > > > > +
> > > > > > arch/arm/mach-socfpga/spl_s10.c | 4
> > > > > > ++++
> > > > > > 2 files changed, 5 insertions(+)
> > > > > >
> > > > > > diff --git a/arch/arm/mach-
> > > > > > socfpga/include/mach/reset_manager_s10.h
> > > > > > b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
> > > > > > index e186296..3ac46c3 100644
> > > > > > --- a/arch/arm/mach-
> > > > > > socfpga/include/mach/reset_manager_s10.h
> > > > > > +++ b/arch/arm/mach-
> > > > > > socfpga/include/mach/reset_manager_s10.h
> > > > > > @@ -95,6 +95,7 @@ struct socfpga_reset_manager {
> > > > > > #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
> > > > > > #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
> > > > > > #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
> > > > > > +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
> > > > > > #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
> > > > > > #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
> > > > > > #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
> > > > > > diff --git a/arch/arm/mach-socfpga/spl_s10.c
> > > > > > b/arch/arm/mach-
> > > > > > socfpga/spl_s10.c
> > > > > > index a141ffe..e063229 100644
> > > > > > --- a/arch/arm/mach-socfpga/spl_s10.c
> > > > > > +++ b/arch/arm/mach-socfpga/spl_s10.c
> > > > > > @@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
> > > > > > writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
> > > > > > &sysmgr_regs->dma);
> > > > > > writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs-
> > > > > > >
> > > > > > > dma_periph);
> > > > > >
> > > > > > + /* enable DMA330 DMA */
> > > > > > + socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
> > > > > > + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
> > > > > > +
> > > > > > spl_disable_firewall_l4_per();
> > > > > >
> > > > > > spl_disable_firewall_l4_sys();
> > > > > >
>
^ permalink raw reply [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller
2019-05-07 3:28 ` Ang, Chee Hong
@ 2019-05-07 3:39 ` Marek Vasut
0 siblings, 0 replies; 8+ messages in thread
From: Marek Vasut @ 2019-05-07 3:39 UTC (permalink / raw)
To: u-boot
On 5/7/19 5:28 AM, Ang, Chee Hong wrote:
> On Fri, 2019-05-03 at 21:31 +0200, Marek Vasut wrote:
>> On 5/3/19 7:56 PM, Ang, Chee Hong wrote:
>>>
>>> On Fri, 2019-05-03 at 19:04 +0200, Marek Vasut wrote:
>>>>
>>>> On 5/3/19 5:53 PM, Ang, Chee Hong wrote:
>>>>>
>>>>>
>>>>> On Fri, 2019-05-03 at 11:55 +0200, Marek Vasut wrote:
>>>>>>
>>>>>>
>>>>>> On 5/3/19 10:18 AM, chee.hong.ang at intel.com wrote:
>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
>>>>>> Commit message is missing -- why do you need to enable the
>>>>>> DMA330
>>>>>> ?
>>>>>>
>>>>>> Don't you have a reset driver, like A10 and Gen5 ?
>>>>> DMA driver for S10 is still missing in u-boot. I need to enable
>>>>> this
>>>>> for booting Linux which is required by Linux's DMA driver.
>>>>> I will add the reason to enable DMA330 in the commit message.
>>>> Can you also answer my question regarding the reset driver ?
>>> Yes. S10 has a reset driver in drivers/reset/reset-socfpga.c.
>> So why don't you use it ? :-)
> Since our u-boot don't have DMA330 driver, I am going to drop this
> patch and let Linux DMA driver take care of the reset. Thanks.
That sounds like a good idea -- only enable peripherals when they are
really needed.
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 8+ messages in thread
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-- links below jump to the message on this page --
2019-05-03 8:18 [U-Boot] [PATCH v1] ARM: socfpga: stratix10: Enable DMA330 DMA controller chee.hong.ang at intel.com
2019-05-03 9:55 ` Marek Vasut
2019-05-03 15:53 ` Ang, Chee Hong
2019-05-03 17:04 ` Marek Vasut
2019-05-03 17:56 ` Ang, Chee Hong
2019-05-03 19:31 ` Marek Vasut
2019-05-07 3:28 ` Ang, Chee Hong
2019-05-07 3:39 ` Marek Vasut
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