From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v12 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
Date: Mon, 6 May 2019 03:34:35 +0000 [thread overview]
Message-ID: <1557113674.10055.0.camel@intel.com> (raw)
In-Reply-To: <CAAh8qsxaRnLELGKs-amhXStM=X2N=eia3R4X-dAP9S+JKXi0gw@mail.gmail.com>
On Fri, 2019-05-03 at 13:54 +0200, Simon Goldschmidt wrote:
> On Thu, May 2, 2019 at 9:56 AM Chee, Tien Fong <tien.fong.chee@intel.
> com> wrote:
> >
> >
> > On Tue, 2019-04-30 at 14:26 +0200, Simon Goldschmidt wrote:
> > >
> > > On Tue, Apr 30, 2019 at 2:19 PM Chee, Tien Fong
> > > <tien.fong.chee@intel.com> wrote:
> > > >
> > > >
> > > >
> > > > On Sat, 2019-04-27 at 21:50 +0200, Simon Goldschmidt wrote:
> > > > >
> > > > >
> > > > >
> > > > > On 19.03.19 09:50, tien.fong.chee at intel.com wrote:
> > > > > >
> > > > > >
> > > > > >
> > > > > > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > > >
> > > > > > Increasing Malloc pool size up to 0x15000 is required to
> > > > > > support
> > > > > > FAT in SPL
> > > > > > . The result of calculation is come from after applying
> > > > > > some
> > > > > > few
> > > > > > patches
> > > > > "Some few patches"? What should that mean? Either you refer
> > > > > to
> > > > > the
> > > > > current state or you can refer to the patchwork items.
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > which are required for optimizing vfat and maximizing
> > > > > > resusable
> > > > > > of
> > > > > > the
> > > > > > memory pool, and then followed by the size required come
> > > > > > from
> > > > > > default max
> > > > > > cluster(0x10000) + others(0x2000) + additional memory for
> > > > > > headroom(0x3000).
> > > > > > Previous records of describing these few patches can be
> > > > > > checked
> > > > > > from here
> > > > > > [v7]: https://www.mail-archive.com/u-boot at lists.denx.de/msg
> > > > > > 3145
> > > > > > 11.h
> > > > > > tml .
> > > > > Why do you refer to mail-archive.com instead of patchwork?
> > > > Contains the cover letter in case reviewer need to know more
> > > > information.
> > > I think you understood that wrong. Why do you reference a 3rd
> > > party
> > > host (mail-archive.com) instead of the official list archive or
> > > patchwork?
> > >
> > > And please note patchwork keeps the cover letter as well.
> > Okay, i can't find any cover letter from this link https://patchwor
> > k.oz
> > labs.org/project/uboot/list/?series=&submitter=70549&state=*&q=&arc
> > hive
> > =both&delegate= . Do you know how to find it?
> - Go to one of the patches of v7, e.g.:
> https://patchwork.ozlabs.org/patch/1034279/
> - click "Related"
> - click the 0/7 link and you'll get the cover letter:
> https://patchwork.ozlabs.org/cover/1034282/
>
> >
> >
> > >
> > >
> > > Also note, this is the commit message which will got into the git
> > > lot.
> > > Referencing v7 and older history seems misplaced here. Better
> > > move
> > > it below the '---'.
> > Okay, noted. So, what should i do with this patch now? Should i
> > send
> > next version with new commit message?
> Well, I don't really care about which host you reference, but yes,
> please send a version that doesn't contain such a reference in
> the commit log.
>
> Other than that, the series is, well, good enough for me to be
> accepted, I guess.
>
> Regards,
> Simon
>
Okay, i will send a next version.
> >
> >
> > Thanks.
> > TF
> >
> > >
> > >
> > > >
> > > >
> > > >
> > > > Thanks.
> > > > >
> > > > >
> > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > > > > >
> > > > > > ---
> > > > > >
> > > > > > changes for v12
> > > > > > - Improved the commit messages.
> > > > > >
> > > > > > changes for v11
> > > > > > - No changes.
> > > > > >
> > > > > > changes for v10
> > > > > > - No changes.
> > > > > >
> > > > > > changes for v9
> > > > > > - No changes.
> > > > > >
> > > > > > changes for v8
> > > > > > - Moved the FIT related configs to the patch of
> > > > > > configuration
> > > > > > for
> > > > > > FPGA
> > > > > > SoCFPGA A10 SoCDK.
> > > > > >
> > > > > > changes for v7
> > > > > > - Keep minimal configs.
> > > > > > ---
> > > > > > include/configs/socfpga_common.h | 4 ++--
> > > > > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > > > > >
> > > > > > diff --git a/include/configs/socfpga_common.h
> > > > > > b/include/configs/socfpga_common.h
> > > > > > index 181af9b646..22533036ed 100644
> > > > > > --- a/include/configs/socfpga_common.h
> > > > > > +++ b/include/configs/socfpga_common.h
> > > > > > @@ -1,6 +1,6 @@
> > > > > > /* SPDX-License-Identifier: GPL-2.0+ */
> > > > > > /*
> > > > > > - * Copyright (C) 2012 Altera Corporation <www.altera.com>
> > > > > > + * Copyright (C) 2012-2019 Altera Corporation <www.altera.
> > > > > > com>
> > > > > > */
> > > > > > #ifndef __CONFIG_SOCFPGA_COMMON_H__
> > > > > > #define __CONFIG_SOCFPGA_COMMON_H__
> > > > > > @@ -254,7 +254,7 @@ unsigned int
> > > > > > cm_get_qspi_controller_clk_hz(void);
> > > > > > #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > > > > > /* SPL memory allocation configuration, this is for FAT
> > > > > > implementation */
> > > > > > #ifndef CONFIG_SYS_SPL_MALLOC_START
> > > > > > -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
> > > > > > +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000
> > > > > > #define
> > > > > > CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_S
> > > > > > IZE - \
> > > > > > CONFIG_SYS_SPL_MALLOC_
> > > > > > SI
> > > > > > ZE + \
> > > > > > CONFIG_SYS_INIT_RAM_AD
> > > > > > DR
> > > > > > )
> > > > > >
next prev parent reply other threads:[~2019-05-06 3:34 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-19 8:50 [U-Boot] [PATCH v12 0/9] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 1/9] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 2/9] ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 3/9] ARM: socfpga: Cleaning up and ensuring consistent format messages in driver tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 4/9] ARM: socfpga: Moving the watchdog reset to the for-loop status polling tien.fong.chee at intel.com
2019-04-27 19:34 ` Simon Goldschmidt
2019-04-30 11:57 ` Chee, Tien Fong
2019-05-06 3:36 ` Chee, Tien Fong
2019-03-19 8:50 ` [U-Boot] [PATCH v12 5/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2019-04-27 19:57 ` Simon Goldschmidt
2019-04-30 12:09 ` Chee, Tien Fong
2019-04-30 12:24 ` Simon Goldschmidt
2019-05-02 7:49 ` Chee, Tien Fong
2019-05-03 11:26 ` Simon Goldschmidt
2019-05-06 3:36 ` Chee, Tien Fong
2019-05-06 7:14 ` Simon Goldschmidt
2019-03-19 8:50 ` [U-Boot] [PATCH v12 6/9] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 7/9] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 8/9] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL tien.fong.chee at intel.com
2019-04-27 19:50 ` Simon Goldschmidt
2019-04-30 12:13 ` Chee, Tien Fong
2019-04-30 12:26 ` Simon Goldschmidt
2019-05-02 7:56 ` Chee, Tien Fong
2019-05-03 11:54 ` Simon Goldschmidt
2019-05-06 3:34 ` Chee, Tien Fong [this message]
2019-04-15 3:52 ` [U-Boot] [PATCH v12 0/9] Add support for loading FPGA bitstream Chee, Tien Fong
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