* [U-Boot] [PATCH v1 1/3] ARM: socfpga: stratix10: Enable PSCI system reset
2019-05-07 5:20 [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux chee.hong.ang at intel.com
@ 2019-05-07 5:20 ` chee.hong.ang at intel.com
2019-05-07 5:20 ` [U-Boot] [PATCH v1 2/3] ARM: socfpga: stratix10: Enable PSCI CPU_ON chee.hong.ang at intel.com
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: chee.hong.ang at intel.com @ 2019-05-07 5:20 UTC (permalink / raw)
To: u-boot
From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
Enable psci_system_reset support for Stratix10. This PSCI function
will eventually trigger the mailbox HPS_REBOOT to SDM.
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/Makefile | 3 +++
arch/arm/mach-socfpga/psci.c | 21 +++++++++++++++++++++
2 files changed, 24 insertions(+)
create mode 100644 arch/arm/mach-socfpga/psci.c
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index e667204..f77b229 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -38,6 +38,9 @@ obj-y += system_manager_s10.o
obj-y += timer_s10.o
obj-y += wrap_pinmux_config_s10.o
obj-y += wrap_pll_config_s10.o
+ifndef CONFIG_SPL_BUILD
+obj-$(CONFIG_ARMV8_PSCI) += psci.o
+endif
endif
ifdef CONFIG_SPL_BUILD
diff --git a/arch/arm/mach-socfpga/psci.c b/arch/arm/mach-socfpga/psci.c
new file mode 100644
index 0000000..9ef3931
--- /dev/null
+++ b/arch/arm/mach-socfpga/psci.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2017 Intel Corporation <www.intel.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <errno.h>
+#include <asm/arch/mailbox_s10.h>
+#include <asm/secure.h>
+
+void __noreturn __secure psci_system_reset(void)
+{
+ mbox_send_cmd_psci(MBOX_ID_UBOOT, MBOX_REBOOT_HPS,
+ MBOX_CMD_DIRECT, 0, NULL, 0, 0, NULL);
+
+ while (1)
+ ;
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1 2/3] ARM: socfpga: stratix10: Enable PSCI CPU_ON
2019-05-07 5:20 [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux chee.hong.ang at intel.com
2019-05-07 5:20 ` [U-Boot] [PATCH v1 1/3] ARM: socfpga: stratix10: Enable PSCI system reset chee.hong.ang at intel.com
@ 2019-05-07 5:20 ` chee.hong.ang at intel.com
2019-05-07 5:20 ` [U-Boot] [PATCH v1 3/3] ARM: socfpga: stratix10: Enable PSCI support for Stratix 10 chee.hong.ang at intel.com
2019-05-09 5:52 ` [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux Ang, Chee Hong
3 siblings, 0 replies; 8+ messages in thread
From: chee.hong.ang at intel.com @ 2019-05-07 5:20 UTC (permalink / raw)
To: u-boot
From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
Enable psci_cpu_on support for Stratix10. This PSCI function
will pass the cpu release address for CPU1-CPU3. Then send event
signal shall be triggered to get these CPUs running Linux code.
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/psci.c | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/mach-socfpga/psci.c b/arch/arm/mach-socfpga/psci.c
index 9ef3931..0af3eb1 100644
--- a/arch/arm/mach-socfpga/psci.c
+++ b/arch/arm/mach-socfpga/psci.c
@@ -11,6 +11,9 @@
#include <asm/arch/mailbox_s10.h>
#include <asm/secure.h>
+static u64 psci_cpu_on_64_cpuid __secure_data;
+static u64 psci_cpu_on_64_entry_point __secure_data;
+
void __noreturn __secure psci_system_reset(void)
{
mbox_send_cmd_psci(MBOX_ID_UBOOT, MBOX_REBOOT_HPS,
@@ -19,3 +22,35 @@ void __noreturn __secure psci_system_reset(void)
while (1)
;
}
+
+/* This function will handle multiple core release based PSCI */
+void __secure psci_cpu_on_64_mpidr(void)
+{
+ asm volatile(
+ ".align 5 \n"
+ "1: wfe \n"
+ " ldr x0, [%0] \n"
+ " ldr x1, [%1] \n"
+ " mrs x2, mpidr_el1 \n"
+ " and x2, x2, #0xff \n"
+ " cmp x0, x2 \n"
+ " b.ne 1b \n"
+ " br x1 \n"
+ : : "r"(&psci_cpu_on_64_cpuid), "r"(&psci_cpu_on_64_entry_point)
+ : "x0", "x1", "x2", "memory", "cc");
+}
+
+int __secure psci_cpu_on_64(u32 function_id, u64 cpuid, u64 entry_point)
+{
+ /* Releases all secondary CPUs to jump into psci_cpu_on_64_mpidr */
+ writeq(0, &psci_cpu_on_64_cpuid);
+ writeq(0, &psci_cpu_on_64_entry_point);
+ writeq((u64)&psci_cpu_on_64_mpidr, CPU_RELEASE_ADDR);
+
+ /* to store in global so psci_cpu_on_64_mpidr function can refer */
+ writeq(entry_point, &psci_cpu_on_64_entry_point);
+ writeq(cpuid, &psci_cpu_on_64_cpuid);
+ asm volatile("sev");
+
+ return ARM_PSCI_RET_SUCCESS;
+}
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1 3/3] ARM: socfpga: stratix10: Enable PSCI support for Stratix 10
2019-05-07 5:20 [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux chee.hong.ang at intel.com
2019-05-07 5:20 ` [U-Boot] [PATCH v1 1/3] ARM: socfpga: stratix10: Enable PSCI system reset chee.hong.ang at intel.com
2019-05-07 5:20 ` [U-Boot] [PATCH v1 2/3] ARM: socfpga: stratix10: Enable PSCI CPU_ON chee.hong.ang at intel.com
@ 2019-05-07 5:20 ` chee.hong.ang at intel.com
2019-05-09 5:52 ` [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux Ang, Chee Hong
3 siblings, 0 replies; 8+ messages in thread
From: chee.hong.ang at intel.com @ 2019-05-07 5:20 UTC (permalink / raw)
To: u-boot
From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
The address of PSCI text, data and stack sections start at
0x00001000 (SDRAM).
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
---
arch/arm/mach-socfpga/Kconfig | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 8f7b79f..6fb508e 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -12,6 +12,12 @@ config SPL_SYS_MALLOC_F_LEN
config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
default 0xa2
+config ARMV8_SECURE_BASE
+ default 0x00001000 if TARGET_SOCFPGA_STRATIX10
+
+config SYS_HAS_ARMV8_SECURE_BASE
+ default y if TARGET_SOCFPGA_STRATIX10
+
config SYS_MALLOC_F_LEN
default 0x2000 if TARGET_SOCFPGA_ARRIA10
default 0x2000 if TARGET_SOCFPGA_GEN5
@@ -56,8 +62,9 @@ config TARGET_SOCFPGA_GEN5
config TARGET_SOCFPGA_STRATIX10
bool
select ARMV8_MULTIENTRY
+ select ARMV8_PSCI
+ select ARMV8_SEC_FIRMWARE_SUPPORT
select ARMV8_SET_SMPEN
- select ARMV8_SPIN_TABLE
select FPGA_STRATIX10
choice
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux
2019-05-07 5:20 [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux chee.hong.ang at intel.com
` (2 preceding siblings ...)
2019-05-07 5:20 ` [U-Boot] [PATCH v1 3/3] ARM: socfpga: stratix10: Enable PSCI support for Stratix 10 chee.hong.ang at intel.com
@ 2019-05-09 5:52 ` Ang, Chee Hong
2019-05-09 6:59 ` Marek Vasut
3 siblings, 1 reply; 8+ messages in thread
From: Ang, Chee Hong @ 2019-05-09 5:52 UTC (permalink / raw)
To: u-boot
On Mon, 2019-05-06 at 22:20 -0700, chee.hong.ang at intel.com wrote:
> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
>
> Add "SYTEM_RESET" (cold reset) and "CPU_ON" (SMP) PSCI support
> for booting Linux on Stratix 10 platform.
>
> Ang, Chee Hong (3):
> ARM: socfpga: stratix10: Enable PSCI system reset
> ARM: socfpga: stratix10: Enable PSCI CPU_ON
> ARM: socfpga: stratix10: Enable PSCI support for Stratix 10
>
> arch/arm/mach-socfpga/Kconfig | 9 ++++++-
> arch/arm/mach-socfpga/Makefile | 3 +++
> arch/arm/mach-socfpga/psci.c | 56
> ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 67 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/mach-socfpga/psci.c
>
Hi Marek,
Any comment on this ? These PSCI patches are needed for booting Linux
on our S10 platform.
BR,
Ang
^ permalink raw reply [flat|nested] 8+ messages in thread* [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux
2019-05-09 5:52 ` [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux Ang, Chee Hong
@ 2019-05-09 6:59 ` Marek Vasut
2019-05-09 8:03 ` Ang, Chee Hong
0 siblings, 1 reply; 8+ messages in thread
From: Marek Vasut @ 2019-05-09 6:59 UTC (permalink / raw)
To: u-boot
On 5/9/19 7:52 AM, Ang, Chee Hong wrote:
> On Mon, 2019-05-06 at 22:20 -0700, chee.hong.ang at intel.com wrote:
>> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
>>
>> Add "SYTEM_RESET" (cold reset) and "CPU_ON" (SMP) PSCI support
>> for booting Linux on Stratix 10 platform.
>>
>> Ang, Chee Hong (3):
>> ARM: socfpga: stratix10: Enable PSCI system reset
>> ARM: socfpga: stratix10: Enable PSCI CPU_ON
>> ARM: socfpga: stratix10: Enable PSCI support for Stratix 10
>>
>> arch/arm/mach-socfpga/Kconfig | 9 ++++++-
>> arch/arm/mach-socfpga/Makefile | 3 +++
>> arch/arm/mach-socfpga/psci.c | 56
>> ++++++++++++++++++++++++++++++++++++++++++
>> 3 files changed, 67 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/mach-socfpga/psci.c
>>
> Hi Marek,
>
> Any comment on this ? These PSCI patches are needed for booting Linux
> on our S10 platform.
Same questions as in Re: [PATCH v1 0/3] Enable HPS execution stage
notification , can we stop adding more and more stuff to arch/ and
instead add it to drivers/ ? As you might have noticed, we are trying to
remove stuff from arch/ and move as much as possible to drivers/ , but
S10 is doing the exact opposite :(
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux
2019-05-09 6:59 ` Marek Vasut
@ 2019-05-09 8:03 ` Ang, Chee Hong
2019-05-09 8:15 ` Marek Vasut
0 siblings, 1 reply; 8+ messages in thread
From: Ang, Chee Hong @ 2019-05-09 8:03 UTC (permalink / raw)
To: u-boot
On Thu, 2019-05-09 at 08:59 +0200, Marek Vasut wrote:
> On 5/9/19 7:52 AM, Ang, Chee Hong wrote:
> >
> > On Mon, 2019-05-06 at 22:20 -0700, chee.hong.ang at intel.com wrote:
> > >
> > > From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
> > >
> > > Add "SYTEM_RESET" (cold reset) and "CPU_ON" (SMP) PSCI support
> > > for booting Linux on Stratix 10 platform.
> > >
> > > Ang, Chee Hong (3):
> > > ARM: socfpga: stratix10: Enable PSCI system reset
> > > ARM: socfpga: stratix10: Enable PSCI CPU_ON
> > > ARM: socfpga: stratix10: Enable PSCI support for Stratix 10
> > >
> > > arch/arm/mach-socfpga/Kconfig | 9 ++++++-
> > > arch/arm/mach-socfpga/Makefile | 3 +++
> > > arch/arm/mach-socfpga/psci.c | 56
> > > ++++++++++++++++++++++++++++++++++++++++++
> > > 3 files changed, 67 insertions(+), 1 deletion(-)
> > > create mode 100644 arch/arm/mach-socfpga/psci.c
> > >
> > Hi Marek,
> >
> > Any comment on this ? These PSCI patches are needed for booting
> > Linux
> > on our S10 platform.
> Same questions as in Re: [PATCH v1 0/3] Enable HPS execution stage
> notification , can we stop adding more and more stuff to arch/ and
> instead add it to drivers/ ? As you might have noticed, we are trying
> to
> remove stuff from arch/ and move as much as possible to drivers/ ,
> but
> S10 is doing the exact opposite :(
>
Not all PSCI code fit in DM (drivers/). There should be a good place to
keep the PSCI code for our platform. Can you advise us where should we
place those PSCI implementation other than arch/ ?
^ permalink raw reply [flat|nested] 8+ messages in thread
* [U-Boot] [PATCH v1 0/3] Enable PSCI services for booting Linux
2019-05-09 8:03 ` Ang, Chee Hong
@ 2019-05-09 8:15 ` Marek Vasut
0 siblings, 0 replies; 8+ messages in thread
From: Marek Vasut @ 2019-05-09 8:15 UTC (permalink / raw)
To: u-boot
On 5/9/19 10:03 AM, Ang, Chee Hong wrote:
> On Thu, 2019-05-09 at 08:59 +0200, Marek Vasut wrote:
>> On 5/9/19 7:52 AM, Ang, Chee Hong wrote:
>>>
>>> On Mon, 2019-05-06 at 22:20 -0700, chee.hong.ang at intel.com wrote:
>>>>
>>>> From: "Ang, Chee Hong" <chee.hong.ang@intel.com>
>>>>
>>>> Add "SYTEM_RESET" (cold reset) and "CPU_ON" (SMP) PSCI support
>>>> for booting Linux on Stratix 10 platform.
>>>>
>>>> Ang, Chee Hong (3):
>>>> ARM: socfpga: stratix10: Enable PSCI system reset
>>>> ARM: socfpga: stratix10: Enable PSCI CPU_ON
>>>> ARM: socfpga: stratix10: Enable PSCI support for Stratix 10
>>>>
>>>> arch/arm/mach-socfpga/Kconfig | 9 ++++++-
>>>> arch/arm/mach-socfpga/Makefile | 3 +++
>>>> arch/arm/mach-socfpga/psci.c | 56
>>>> ++++++++++++++++++++++++++++++++++++++++++
>>>> 3 files changed, 67 insertions(+), 1 deletion(-)
>>>> create mode 100644 arch/arm/mach-socfpga/psci.c
>>>>
>>> Hi Marek,
>>>
>>> Any comment on this ? These PSCI patches are needed for booting
>>> Linux
>>> on our S10 platform.
>> Same questions as in Re: [PATCH v1 0/3] Enable HPS execution stage
>> notification , can we stop adding more and more stuff to arch/ and
>> instead add it to drivers/ ? As you might have noticed, we are trying
>> to
>> remove stuff from arch/ and move as much as possible to drivers/ ,
>> but
>> S10 is doing the exact opposite :(
>>
> Not all PSCI code fit in DM (drivers/). There should be a good place to
> keep the PSCI code for our platform. Can you advise us where should we
> place those PSCI implementation other than arch/ ?
Look through this discussion:
https://www.mail-archive.com/u-boot at lists.denx.de/msg319458.html
and possibly follow up on it.
--
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 8+ messages in thread