[U-Boot] [PATCH 1/7] ARM: at91: Add the chip ID for SAMA5D2 LPDDR2 SiP

Eugen.Hristev at microchip.com
2019-08-08T07:48:23Z

From: Nicolas Ferre <nicolas.ferre@microchip.com>

The SAMA5D2 LPDDR2 SiP (System in Package) is added for SoC
identification.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
---
arch/arm/mach-at91/armv7/sama5d2_devices.c | 8 ++++++++
arch/arm/mach-at91/include/mach/sama5d2.h | 4 ++++
2 files changed, 12 insertions(+)

diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c
index 59a0c44..9e9d026 100644
--- a/arch/arm/mach-at91/armv7/sama5d2_devices.c
+++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c
@@ -57,8 +57,16 @@ char *get_cpu_name(void)
return "SAMA5D27 512M bits DDR2 SDRAM";
case ARCH_EXID_SAMA5D27C_D1G:
return "SAMA5D27 1G bits DDR2 SDRAM";
+ case ARCH_EXID_SAMA5D27C_LD1G:
+ return "SAMA5D27 1G bits LPDDR2 SDRAM";
+ case ARCH_EXID_SAMA5D27C_LD2G:
+ return "SAMA5D27 2G bits LPDDR2 SDRAM";
case ARCH_EXID_SAMA5D28C_D1G:
return "SAMA5D28 1G bits DDR2 SDRAM";
+ case ARCH_EXID_SAMA5D28C_LD1G:
+ return "SAMA5D28 1G bits LPDDR2 SDRAM";
+ case ARCH_EXID_SAMA5D28C_LD2G:
+ return "SAMA5D28 2G bits LPDDR2 SDRAM";
}
}

diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
index c7d9bb5..d1b2e01 100644
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -220,7 +220,11 @@
#define ARCH_EXID_SAMA5D225C_D1M 0x00000053
#define ARCH_EXID_SAMA5D27C_D5M 0x00000032
#define ARCH_EXID_SAMA5D27C_D1G 0x00000033
+#define ARCH_EXID_SAMA5D27C_LD1G 0x00000061
+#define ARCH_EXID_SAMA5D27C_LD2G 0x00000062
#define ARCH_EXID_SAMA5D28C_D1G 0x00000013
+#define ARCH_EXID_SAMA5D28C_LD1G 0x00000071
+#define ARCH_EXID_SAMA5D28C_LD2G 0x00000072

/* Checked if defined in ethernet driver macb */
#define cpu_is_sama5d2 _cpu_is_sama5d2
--
2.7.4