[U-Boot] [PATCH 5/7] board: laird: wb50n: use configure_ddrcfg_input_buffers

[Eugen.Hristev at microchip.com <Eugen.Hristev@microchip.com>]

From: Eugen Hristev <eugen.hristev@microchip.com>

Replace code with new function configure_ddrcfg_input_buffers from SFR
mach driver.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
---
 arch/arm/mach-at91/Kconfig | 1 +
 board/laird/wb50n/wb50n.c  | 4 +---
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index ad09731..ce0b1b4 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -292,6 +292,7 @@ config TARGET_WB50N
 	select BOARD_LATE_INIT
 	select CPU_V7A
 	select SUPPORT_SPL
+	select ATMEL_SFR
 
 endchoice
 
diff --git a/board/laird/wb50n/wb50n.c b/board/laird/wb50n/wb50n.c
index 89d3795..1598e5c 100644
--- a/board/laird/wb50n/wb50n.c
+++ b/board/laird/wb50n/wb50n.c
@@ -172,13 +172,11 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
 
 void mem_init(void)
 {
-	struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR;
 	struct atmel_mpddrc_config ddr2;
 
 	ddr2_conf(&ddr2);
 
-	writel(ATMEL_SFR_DDRCFG_FDQIEN | ATMEL_SFR_DDRCFG_FDQSIEN,
-	       &sfr->ddrcfg);
+	configure_ddrcfg_input_buffers(true);
 
 	/* enable MPDDR clock */
 	at91_periph_clk_enable(ATMEL_ID_MPDDRC);
-- 
2.7.4