From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kurt Miller Date: Mon, 19 Aug 2019 13:07:10 -0400 Subject: [U-Boot] Rockpro64_V2.1 2018-07-02 Boot Freeze In-Reply-To: References: <1565991886.11007.28.camel@intricatesoftware.com> <1566223437.11007.33.camel@intricatesoftware.com> <1566227577.11007.35.camel@intricatesoftware.com> Message-ID: <1566234430.11007.49.camel@intricatesoftware.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On Mon, 2019-08-19 at 22:11 +0530, Jagan Teki wrote: > On Mon, Aug 19, 2019 at 8:42 PM Kurt Miller wrote: > > > > > > Hi Michael, > > > > On Mon, 2019-08-19 at 16:06 +0200, Michael Nazzareno Trimarchi wrote: > > > > > > It's possible to dump the register after training in mainline uboot? > > I'm working on getting master to build now. How would I > > go about dumping the register after training? > It would be a bit hard, I tried below sequence at the end of > sdram_init (sorry for direct copy) > >         printf("cic: ctr10: (0x%x - 0x%x)\n", &dram->cic->cic_ctrl0, > readl(&dram->cic->cic_ctrl0)); >         printf("cic: status0: (0x%x - 0x%x)\n", > &dram->cic->cic_status0, readl(&dram->cic->cic_status0)); >         printf("grf: ddrc0_con0 (0x%x - 0x%x)\n", > &dram->grf->ddrc0_con0, readl(&dram->grf->ddrc0_con0)); >         printf("grf: ddrc1_con0 (0x%x - 0x%x)\n", > &dram->grf->ddrc1_con0, readl(&dram->grf->ddrc1_con0)); >         printf("grf: soc_con0 (0x%x - 0x%x)\n", &dram->grf->soc_con0, > readl(&dram->grf->soc_con0)); >         printf("pmu: noc_auto_ena (0x%x - 0x%x)\n", > &dram->pmu->pmu_noc_auto_ena, readl(&dram->pmu->pmu_noc_auto_ena)); >         printf("pmu: bus_idle_req (0x%x - 0x%x)\n", > &dram->pmu->pmu_bus_idle_req, readl(&dram->pmu->pmu_bus_idle_req)); >         printf("pmu: bus_idle_st (0x%x - 0x%x)\n", > &dram->pmu->pmu_bus_idle_st, readl(&dram->pmu->pmu_bus_idle_st)); >         printf("pmugrf: os_reg2 (0x%x - 0x%x)\n", > &dram->pmugrf->os_reg2, readl(&dram->pmugrf->os_reg2)); >         printf("pmugrf: os_reg3 (0x%x - 0x%x)\n", > &dram->pmugrf->os_reg3, readl(&dram->pmugrf->os_reg3)); >         printf("pmusgrf: soc_con4 (0x%x - 0x%x)\n", > &dram->pmusgrf->soc_con4, readl(&dram->pmusgrf->soc_con4)); Thank you. I have built mainline with CONFIG_RAM_ROCKCHIP_DEBUG=y with your printf's above and it outputs the following before freezing: U-Boot TPL 2019.10-rc2-00016-g81fed78c0a-dirty (Aug 19 2019 - 12:57:39)       LPDDR4, 50MHz                                                                 BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB                       LPDDR4, 50MHz                                                                 BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB 256B stride                              cic: ctr10: (0xff620000 - 0x14)          cic: status0: (0xff620010 - 0x101)       grf: ddrc0_con0 (0xff77e380 - 0x1f81)    grf: ddrc1_con0 (0xff77e388 - 0x1f81)    grf: soc_con0 (0xff77e200 - 0x7) pmu: noc_auto_ena (0xff3100d8 - 0x0) pmu: bus_idle_req (0xff310060 - 0x0) pmu: bus_idle_st (0xff310064 - 0x0) pmugrf: os_reg2 (0xff320308 - 0x32a1f2a1) pmugrf: os_reg3 (0xff32030c - 0x20000005) pmusgrf: soc_con4 (0xff33e010 - 0x2600) Note that 'Size=1024MB' is incorrect. With 'rockchip-linux' TPL I see 'Size=2048MB'. Regards, -Kurt