From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v8 12/19] arm: agilex: Add clock handoff offset for Agilex
Date: Wed, 27 Nov 2019 15:55:25 +0800 [thread overview]
Message-ID: <1574841332-8977-13-git-send-email-ley.foon.tan@intel.com> (raw)
In-Reply-To: <1574841332-8977-1-git-send-email-ley.foon.tan@intel.com>
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
---
v8:
- Fixed missing CONFIG_ prefix for TARGET_SOCFPGA_STRATIX10.
---
arch/arm/mach-socfpga/include/mach/handoff_s10.h | 9 +++++++--
arch/arm/mach-socfpga/wrap_pll_config_s10.c | 5 +++--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/handoff_s10.h b/arch/arm/mach-socfpga/include/mach/handoff_s10.h
index ba0f1fd1b2..3e9b606ce2 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_s10.h
@@ -26,8 +26,13 @@
#define S10_HANDOFF_OFFSET_LENGTH 0x4
#define S10_HANDOFF_OFFSET_DATA 0x10
-#define S10_HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
-#define S10_HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
+#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
+#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
+#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
+#else
+#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x5fc)
+#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x600)
+#endif
#define S10_HANDOFF_SIZE 4096
diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c b/arch/arm/mach-socfpga/wrap_pll_config_s10.c
index b266a5817b..3da85791a1 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config_s10.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config_s10.c
@@ -33,7 +33,8 @@ const struct cm_config * const cm_get_default_config(void)
const unsigned int cm_get_osc_clk_hz(void)
{
#ifdef CONFIG_SPL_BUILD
- u32 clock = readl(S10_HANDOFF_CLOCK_OSC);
+
+ u32 clock = readl(HANDOFF_CLOCK_OSC);
writel(clock,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD1);
@@ -50,7 +51,7 @@ const unsigned int cm_get_intosc_clk_hz(void)
const unsigned int cm_get_fpga_clk_hz(void)
{
#ifdef CONFIG_SPL_BUILD
- u32 clock = readl(S10_HANDOFF_CLOCK_FPGA);
+ u32 clock = readl(HANDOFF_CLOCK_FPGA);
writel(clock,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD2);
--
2.19.0
next prev parent reply other threads:[~2019-11-27 7:55 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-27 7:55 [U-Boot] [PATCH v8 00/19] Add Intel Agilex SoC support Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 01/19] arm: socfpga: agilex: Add base address for Intel Agilex SoC Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 02/19] arm: socfpga: Move firewall code to firewall file Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 03/19] arm: socfpga: Move Stratix10 and Agilex reset manager common code Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 04/19] arm: socfpga: agilex: Add reset manager support Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 05/19] arm: socfpga: Move Stratix10 and Agilex system manager common code Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 06/19] arm: socfpga: agilex: Add system manager support Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 07/19] arm: socfpga: Move Stratix10 and Agilex clock manager common code Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 08/19] arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 09/19] clk: agilex: Add clock driver for Agilex Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 10/19] arm: socfpga: agilex: Add clock wrapper functions Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 11/19] cache: Add Arteris Ncore cache coherent unit driver Ley Foon Tan
2019-11-27 7:55 ` Ley Foon Tan [this message]
2019-11-27 7:55 ` [U-Boot] [PATCH v8 13/19] ddr: altera: Restructure Stratix 10 SDRAM driver Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 14/19] ddr: altera: agilex: Add SDRAM driver for Agilex Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 15/19] board: intel: agilex: Add socdk board support for Intel Agilex SoC Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 16/19] arm: socfpga: agilex: Add SPL for " Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 17/19] arm: dts: agilex: Add base dtsi and devkit dts Ley Foon Tan
2019-11-27 10:24 ` Simon Goldschmidt
2019-11-28 7:21 ` Ley Foon Tan
2019-11-28 7:28 ` Simon Goldschmidt
2019-11-28 7:33 ` Ley Foon Tan
2019-11-28 7:31 ` Ley Foon Tan
2019-11-28 7:34 ` Simon Goldschmidt
2019-11-27 7:55 ` [U-Boot] [PATCH v8 18/19] configs: socfpga: Move Stratix10 and Agilex common CONFIGs Ley Foon Tan
2019-11-27 19:27 ` Simon Goldschmidt
2019-11-27 7:55 ` [U-Boot] [PATCH v8 19/19] arm: socfpga: agilex: Enable Agilex SoC build Ley Foon Tan
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