From: Ley Foon Tan <ley.foon.tan@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v8 01/19] arm: socfpga: agilex: Add base address for Intel Agilex SoC
Date: Wed, 27 Nov 2019 15:55:14 +0800 [thread overview]
Message-ID: <1574841332-8977-2-git-send-email-ley.foon.tan@intel.com> (raw)
In-Reply-To: <1574841332-8977-1-git-send-email-ley.foon.tan@intel.com>
Add base address for Intel Agilex SoC.
Reuse base_addr_s10.h for Agilex, only one base address is
different from S10.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
---
v2:
- Reuse base_addr_s10.h and add #ifdef Agilex for SOCFPGA_FW_MPU_DDR_SCR_ADDRESS
---
arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
index 1f549d7e70..d3eca65e97 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
@@ -10,7 +10,11 @@
#define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400
#define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000
#define SOCFPGA_SDR_ADDRESS 0xf8011000
+#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
+#define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020200
+#else
#define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020100
+#endif
#define SOCFPGA_SMMU_ADDRESS 0xfa000000
#define SOCFPGA_MAILBOX_ADDRESS 0xffa30000
#define SOCFPGA_UART0_ADDRESS 0xffc02000
--
2.19.0
next prev parent reply other threads:[~2019-11-27 7:55 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-27 7:55 [U-Boot] [PATCH v8 00/19] Add Intel Agilex SoC support Ley Foon Tan
2019-11-27 7:55 ` Ley Foon Tan [this message]
2019-11-27 7:55 ` [U-Boot] [PATCH v8 02/19] arm: socfpga: Move firewall code to firewall file Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 03/19] arm: socfpga: Move Stratix10 and Agilex reset manager common code Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 04/19] arm: socfpga: agilex: Add reset manager support Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 05/19] arm: socfpga: Move Stratix10 and Agilex system manager common code Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 06/19] arm: socfpga: agilex: Add system manager support Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 07/19] arm: socfpga: Move Stratix10 and Agilex clock manager common code Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 08/19] arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 09/19] clk: agilex: Add clock driver for Agilex Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 10/19] arm: socfpga: agilex: Add clock wrapper functions Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 11/19] cache: Add Arteris Ncore cache coherent unit driver Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 12/19] arm: agilex: Add clock handoff offset for Agilex Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 13/19] ddr: altera: Restructure Stratix 10 SDRAM driver Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 14/19] ddr: altera: agilex: Add SDRAM driver for Agilex Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 15/19] board: intel: agilex: Add socdk board support for Intel Agilex SoC Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 16/19] arm: socfpga: agilex: Add SPL for " Ley Foon Tan
2019-11-27 7:55 ` [U-Boot] [PATCH v8 17/19] arm: dts: agilex: Add base dtsi and devkit dts Ley Foon Tan
2019-11-27 10:24 ` Simon Goldschmidt
2019-11-28 7:21 ` Ley Foon Tan
2019-11-28 7:28 ` Simon Goldschmidt
2019-11-28 7:33 ` Ley Foon Tan
2019-11-28 7:31 ` Ley Foon Tan
2019-11-28 7:34 ` Simon Goldschmidt
2019-11-27 7:55 ` [U-Boot] [PATCH v8 18/19] configs: socfpga: Move Stratix10 and Agilex common CONFIGs Ley Foon Tan
2019-11-27 19:27 ` Simon Goldschmidt
2019-11-27 7:55 ` [U-Boot] [PATCH v8 19/19] arm: socfpga: agilex: Enable Agilex SoC build Ley Foon Tan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1574841332-8977-2-git-send-email-ley.foon.tan@intel.com \
--to=ley.foon.tan@intel.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox