From: Sam Shih <sam.shih@mediatek.com>
To: u-boot@lists.denx.de
Subject: [RESEND v2 05/10] clk: mediatek: fix clock-rate overflow problem
Date: Fri, 10 Jan 2020 16:30:30 +0800 [thread overview]
Message-ID: <1578645035-3032-6-git-send-email-sam.shih@mediatek.com> (raw)
In-Reply-To: <1578645035-3032-1-git-send-email-sam.shih@mediatek.com>
This patch fix clock-rate overflow problem in mediatek
clock driver common part.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
---
drivers/clk/mediatek/clk-mtk.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index 6c6b500d9b..9c30be994e 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -39,7 +39,7 @@
* this function is recursively called to find the parent to calculate
* the accurate frequency.
*/
-static int mtk_clk_find_parent_rate(struct clk *clk, int id,
+static ulong mtk_clk_find_parent_rate(struct clk *clk, int id,
const struct driver *drv)
{
struct clk parent = { .id = id, };
@@ -265,7 +265,7 @@ static ulong mtk_factor_recalc_rate(const struct mtk_fixed_factor *fdiv,
return rate;
}
-static int mtk_topckgen_get_factor_rate(struct clk *clk, u32 off)
+static ulong mtk_topckgen_get_factor_rate(struct clk *clk, u32 off)
{
struct mtk_clk_priv *priv = dev_get_priv(clk->dev);
const struct mtk_fixed_factor *fdiv = &priv->tree->fdivs[off];
@@ -287,7 +287,7 @@ static int mtk_topckgen_get_factor_rate(struct clk *clk, u32 off)
return mtk_factor_recalc_rate(fdiv, rate);
}
-static int mtk_topckgen_get_mux_rate(struct clk *clk, u32 off)
+static ulong mtk_topckgen_get_mux_rate(struct clk *clk, u32 off)
{
struct mtk_clk_priv *priv = dev_get_priv(clk->dev);
const struct mtk_composite *mux = &priv->tree->muxes[off];
--
2.17.1
next prev parent reply other threads:[~2020-01-10 8:30 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-10 8:30 [RESEND v2,00/10] Add support for MediaTek MT7622 SoC Sam Shih
2020-01-10 8:30 ` [RESEND v2 01/10] ARM: MediaTek: " Sam Shih
2020-01-16 14:42 ` Tom Rini
2020-01-10 8:30 ` [RESEND v2 02/10] pinctrl: mediatek: add driver for MT7622 Sam Shih
2020-01-16 14:43 ` Tom Rini
2020-01-10 8:30 ` [RESEND v2 03/10] pinctrl: mediatek: add support for different pinctrl Sam Shih
2020-01-16 14:43 ` Tom Rini
2020-01-10 8:30 ` [RESEND v2 04/10] clk: mediatek: add driver for MT7622 Sam Shih
2020-01-16 14:43 ` Tom Rini
2020-01-10 8:30 ` Sam Shih [this message]
2020-01-16 14:43 ` [RESEND v2 05/10] clk: mediatek: fix clock-rate overflow problem Tom Rini
2020-01-10 8:30 ` [RESEND v2 06/10] power: domain: add power domain support for MT7622 Sam Shih
2020-01-16 14:43 ` Tom Rini
2020-01-10 8:30 ` [RESEND v2 07/10] mmc: add mmc and sd " Sam Shih
2020-01-16 14:43 ` Tom Rini
2020-01-10 8:30 ` [RESEND v2 08/10] Add support for MT7622 reference board Sam Shih
2020-01-16 14:43 ` Tom Rini
2020-01-10 8:30 ` [RESEND v2 09/10] arm: dts: mediatek: move u-boot properties to -u-boot.dtsi file Sam Shih
2020-01-16 14:43 ` Tom Rini
2020-01-10 8:30 ` [RESEND v2 10/10] configs: mediatek: fix mt7623n bpir2 defconfig Sam Shih
2020-01-16 14:43 ` Tom Rini
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