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([2a01:e0a:3d9:2080:f2a4:b974:cba3:a605]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec169b8a3sm125685435e9.19.2025.04.07.02.02.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Apr 2025 02:02:55 -0700 (PDT) Message-ID: <157becc8-34c2-48eb-a65e-55d312e9aa05@linaro.org> Date: Mon, 7 Apr 2025 11:02:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: neil.armstrong@linaro.org Subject: Re: [PATCH 3/7] mmc: msm_sdhci: handle bulk clock initialization error To: Jorge Ramirez-Ortiz , caleb.connolly@linaro.org, sumit.garg@kernel.org Cc: u-boot-qcom@groups.io, u-boot@lists.denx.de References: <20250407081927.138915-1-jorge.ramirez@oss.qualcomm.com> <20250407081927.138915-4-jorge.ramirez@oss.qualcomm.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; keydata= xsBNBE1ZBs8BCAD78xVLsXPwV/2qQx2FaO/7mhWL0Qodw8UcQJnkrWmgTFRobtTWxuRx8WWP GTjuhvbleoQ5Cxjr+v+1ARGCH46MxFP5DwauzPekwJUD5QKZlaw/bURTLmS2id5wWi3lqVH4 BVF2WzvGyyeV1o4RTCYDnZ9VLLylJ9bneEaIs/7cjCEbipGGFlfIML3sfqnIvMAxIMZrvcl9 qPV2k+KQ7q+aXavU5W+yLNn7QtXUB530Zlk/d2ETgzQ5FLYYnUDAaRl+8JUTjc0CNOTpCeik 80TZcE6f8M76Xa6yU8VcNko94Ck7iB4vj70q76P/J7kt98hklrr85/3NU3oti3nrIHmHABEB AAHNKk5laWwgQXJtc3Ryb25nIDxuZWlsLmFybXN0cm9uZ0BsaW5hcm8ub3JnPsLAkQQTAQoA OwIbIwULCQgHAwUVCgkICwUWAgMBAAIeAQIXgBYhBInsPQWERiF0UPIoSBaat7Gkz/iuBQJk Q5wSAhkBAAoJEBaat7Gkz/iuyhMIANiD94qDtUTJRfEW6GwXmtKWwl/mvqQtaTtZID2dos04 YqBbshiJbejgVJjy+HODcNUIKBB3PSLaln4ltdsV73SBcwUNdzebfKspAQunCM22Mn6FBIxQ GizsMLcP/0FX4en9NaKGfK6ZdKK6kN1GR9YffMJd2P08EO8mHowmSRe/ExAODhAs9W7XXExw UNCY4pVJyRPpEhv373vvff60bHxc1k/FF9WaPscMt7hlkbFLUs85kHtQAmr8pV5Hy9ezsSRa GzJmiVclkPc2BY592IGBXRDQ38urXeM4nfhhvqA50b/nAEXc6FzqgXqDkEIwR66/Gbp0t3+r yQzpKRyQif3OwE0ETVkGzwEIALyKDN/OGURaHBVzwjgYq+ZtifvekdrSNl8TIDH8g1xicBYp QTbPn6bbSZbdvfeQPNCcD4/EhXZuhQXMcoJsQQQnO4vwVULmPGgtGf8PVc7dxKOeta+qUh6+ SRh3vIcAUFHDT3f/Zdspz+e2E0hPV2hiSvICLk11qO6cyJE13zeNFoeY3ggrKY+IzbFomIZY 4yG6xI99NIPEVE9lNBXBKIlewIyVlkOaYvJWSV+p5gdJXOvScNN1epm5YHmf9aE2ZjnqZGoM Mtsyw18YoX9BqMFInxqYQQ3j/HpVgTSvmo5ea5qQDDUaCsaTf8UeDcwYOtgI8iL4oHcsGtUX oUk33HEAEQEAAcLAXwQYAQIACQUCTVkGzwIbDAAKCRAWmrexpM/4rrXiB/sGbkQ6itMrAIfn M7IbRuiSZS1unlySUVYu3SD6YBYnNi3G5EpbwfBNuT3H8//rVvtOFK4OD8cRYkxXRQmTvqa3 3eDIHu/zr1HMKErm+2SD6PO9umRef8V82o2oaCLvf4WeIssFjwB0b6a12opuRP7yo3E3gTCS KmbUuLv1CtxKQF+fUV1cVaTPMyT25Od+RC1K+iOR0F54oUJvJeq7fUzbn/KdlhA8XPGzwGRy 4zcsPWvwnXgfe5tk680fEKZVwOZKIEuJC3v+/yZpQzDvGYJvbyix0lHnrCzq43WefRHI5XTT QbM0WUIBIcGmq38+OgUsMYu4NzLu7uZFAcmp6h8g Organization: Linaro In-Reply-To: <20250407081927.138915-4-jorge.ramirez@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: neil.armstrong@linaro.org Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 07/04/2025 10:19, Jorge Ramirez-Ortiz wrote: > Some boards do not require all clocks to be available (i.e: > dragonboard820c). Can you specify which clock isn't available ? Because we have clk-stub for that Thanks, Neil > > This change provides a fallback to the core clock when the bulk cant be > retrived. > > Signed-off-by: Jorge Ramirez-Ortiz > --- > drivers/mmc/msm_sdhci.c | 27 +++++++++++++++++++++++++-- > 1 file changed, 25 insertions(+), 2 deletions(-) > > diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c > index 27bb7052fca..8081330bd25 100644 > --- a/drivers/mmc/msm_sdhci.c > +++ b/drivers/mmc/msm_sdhci.c > @@ -9,6 +9,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -56,6 +57,17 @@ struct msm_sdhc_variant_info { > > DECLARE_GLOBAL_DATA_PTR; > > +static int get_core_clock(struct udevice *dev, struct clk_bulk *bulk) > +{ > + bulk->count = 1; > + > + bulk->clks = devm_kcalloc(dev, 1, sizeof(struct clk), GFP_KERNEL); > + if (!bulk->clks) > + return -ENOMEM; > + > + return clk_get_by_name(dev, "core", &bulk->clks[0]); > +} > + > static int msm_sdc_clk_init(struct udevice *dev) > { > struct msm_sdhc *prv = dev_get_priv(dev); > @@ -73,8 +85,15 @@ static int msm_sdc_clk_init(struct udevice *dev) > > ret = clk_get_bulk(dev, &prv->clks); > if (ret) { > - log_warning("Couldn't get mmc clocks: %d\n", ret); > - return ret; > + log_warning("Bulk clocks not available (%d), trying core clock\n", ret); > + > + /* Sometimes not all clocks are needed - chainloading uboot */ > + ret = get_core_clock(dev, &prv->clks); > + if (ret) { > + log_warning("Core clock not available:(%d)\n", ret); > + return ret; > + } > + n_clks = 1; > } > > ret = clk_enable_bulk(&prv->clks); > @@ -83,6 +102,9 @@ static int msm_sdc_clk_init(struct udevice *dev) > return ret; > } > > + if (n_clks == 1) > + goto set_rate; > + > /* If clock-names is unspecified, then the first clock is the core clock */ > if (!ofnode_get_property(node, "clock-names", &n_clks)) { > if (!clk_set_rate(&prv->clks.clks[0], clk_rate)) { > @@ -105,6 +127,7 @@ static int msm_sdc_clk_init(struct udevice *dev) > return -EINVAL; > } > > +set_rate: > /* The clock is already enabled by the clk_bulk above */ > clk_rate = clk_set_rate(&prv->clks.clks[i], clk_rate); > /* If we get a rate of 0 then something has probably gone wrong. */