From mboxrd@z Thu Jan  1 00:00:00 1970
From: solaz <fe700000@gmail.com>
Date: Mon, 12 May 2008 13:56:47 -0700 (PDT)
Subject: [U-Boot-Users]  FCC1 Ethernet can send but not receive in ping
Message-ID: <17189980.post@talk.nabble.com>
List-Id: <u-boot.lists.denx.de>
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Hi, all,

The FCC1 Ethernet can generate ARP packets but fails to answer the host.
tcpdump message:
 
"14:00:34.770939 arp who-has 172.16.1.9 tell 172.16.1.53
14:00:34.773488 arp reply 172.16.1.9 is-at 00:13:72:c0:19:31 (oui Unknown)"

I am porting u-boot to a customized MPC8272 board. I configure Ethernet
using FCC1 and set CLK9(PC23) 
as FCC1 RXCLK, CLK10(PC22) as FCC1 TXCLK. However, after the u-boot starting
up I find that the pdira is changed to 0x00d43f8e (not 0x00d43f8c I set in
the iop_conf_tab[4][32]), and ppara is changed to 0x0003cc31 (not
0x0003fc3f). Tcpdump captures nothing at this moment. 

By using BDI2000 I change pdira and ppara values back to the ones I want and
tcpdump captures the above ARP message.

I could not find where and how the u-boot codes change the pdira and ppara,
please help. And may other places relate to the problem? Thanks a lot.

So far I have only tried FCC1, not FCC2 yet. The Ethernet tranceiver is
LXT973.

regards,

Solaz


Here are settings related to FCC1:

===== in /board/MyBoard.c=====

   /* Port A configuration */
    {	/*	      conf ppar psor pdir podr pdat */
	/* PA31 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII COL  */
	/* PA30 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII CRS */
	/* PA29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 MII TX_ER */
	/* PA28 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 MII TX_EN */
	/* PA27 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII RX_DV */
	/* PA26 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 MII RX_ER */
	
             ...

	/* PA21 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[3]*/
	/* PA20 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[2] */
	/* PA19 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[1] */
	/* PA18 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 MII TxD[0]*/
	/* PA17 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[0]*/
	/* PA16 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[1]*/
	/* PA15 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[2]*/
	/* PA14 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 MII RxD[3]*/

             ...

	/* PC23 */ {   1,   1,   0,   0,   0,   0   }, /* CLK9 FCC1 RXCLK -- FCC1
MII Rx Clock (CLK9)*/
	/* PC22 */ {   1,   1,   0,   0,   0,   0   }, /* CLK10FCC1 TXCLK -- FCC1
MII Tx Clock (CLK10)*/

======in include/configs/MYBOARD.h======

#undef	CONFIG_ETHER_ON_SCC                   /* define if ether on SCC      
*/
#define CONFIG_ETHER_ON_FCC                     /* define if ether on FCC      
*/
#undef	CONFIG_ETHER_NONE                      /* define if ether on
something else */
#define	CONFIG_ETHER_INDEX         1           /* which SCC/FCC channel for
ethernet */


# define CFG_CMXFCR_MASK       
(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
# define CFG_CMXFCR_VALUE       (CMXFCR_RF1CS_CLK9|CMXFCR_TF1CS_CLK10)
# define CFG_CPMFCR_RAMTYPE   0                 /*BDs and buffers on 60x bus
*/
# define CFG_FCC_PSMR              (FCC_PSMR_FDE|FCC_PSMR_LPB)        /*Full
dulplex*/


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