From: santoshguru at yahoo.com <santoshguru@yahoo.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] Enabling Cache in MPC5200
Date: Tue, 04 Sep 2007 01:11:39 -0700 [thread overview]
Message-ID: <18006748.3362451188893499288.JavaMail.nabble@isper.nabble.com> (raw)
Hi,
I am using a LITE5200 evaluation board, and am not able to enable the cache.
The execution hangs in these calls.
void EnableInstCache(void)
{
__asm(" mfspr r5,1008");
__asm(" ori r5,r5,0x00008800");// # Set the ICE and ICFI bit
__asm(" andi. r6,r5,0x0000F7FF");// # clear the ICFI bit for the final store
__asm(" mtspr 1008,r5");
__asm(" isync");
__asm(" isync");
__asm(" isync");
__asm(" isync");
__asm(" sync");
__asm(" mtspr 1008,r6");// # Do the final store
__asm(" isync");
__asm(" sync");
}
void EnableDataCache(void)
{
__asm(" mfspr r5,1008");
__asm(" ori r5,r5,0x00004400");// # Set the ICE and ICFI bit
__asm(" andi. r6,r5,0x0000FBFF");// # clear the ICFI bit for the final store
__asm(" mtspr 1008,r5");
__asm(" isync");
__asm(" isync");
__asm(" isync");
__asm(" isync");
__asm(" sync");
__asm(" mtspr 1008,r6");// # Do the final store
__asm(" isync");
__asm(" sync");
}
What could be the problem?
Thanks
-San
next reply other threads:[~2007-09-04 8:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-04 8:11 santoshguru at yahoo.com [this message]
2007-09-05 10:54 ` [U-Boot-Users] Enabling Cache in MPC5200 Detlev Zundel
2007-09-05 12:25 ` sanguru
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