From mboxrd@z Thu Jan 1 00:00:00 1970 From: santoshguru at yahoo.com Date: Tue, 04 Sep 2007 01:11:39 -0700 Subject: [U-Boot-Users] Enabling Cache in MPC5200 Message-ID: <18006748.3362451188893499288.JavaMail.nabble@isper.nabble.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, I am using a LITE5200 evaluation board, and am not able to enable the cache. The execution hangs in these calls. void EnableInstCache(void) { __asm(" mfspr r5,1008"); __asm(" ori r5,r5,0x00008800");// # Set the ICE and ICFI bit __asm(" andi. r6,r5,0x0000F7FF");// # clear the ICFI bit for the final store __asm(" mtspr 1008,r5"); __asm(" isync"); __asm(" isync"); __asm(" isync"); __asm(" isync"); __asm(" sync"); __asm(" mtspr 1008,r6");// # Do the final store __asm(" isync"); __asm(" sync"); } void EnableDataCache(void) { __asm(" mfspr r5,1008"); __asm(" ori r5,r5,0x00004400");// # Set the ICE and ICFI bit __asm(" andi. r6,r5,0x0000FBFF");// # clear the ICFI bit for the final store __asm(" mtspr 1008,r5"); __asm(" isync"); __asm(" isync"); __asm(" isync"); __asm(" isync"); __asm(" sync"); __asm(" mtspr 1008,r6");// # Do the final store __asm(" isync"); __asm(" sync"); } What could be the problem? Thanks -San