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[82.149.19.102]) by smtp.gmail.com with ESMTPSA id gr24-20020a170906e2d800b007815c3e95f6sm1886716ejb.146.2022.10.12.14.28.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Oct 2022 14:28:23 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Jagan Teki , Andre Przywara Cc: u-boot@lists.denx.de, linux-sunxi@lists.linux.dev, Samuel Holland Subject: Re: [PATCH] sunxi: defconfig: Add X96 Mate TV box Date: Wed, 12 Oct 2022 23:28:22 +0200 Message-ID: <1803881.atdPhlSkOF@kista> In-Reply-To: <20221012162610.1968666-1-andre.przywara@arm.com> References: <20221012162610.1968666-1-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Andre, Dne sreda, 12. oktober 2022 ob 18:26:10 CEST je Andre Przywara napisal(a): > The X96 Mate TV box is a TV box with the Allwinner H616 SoC. It is > available with up to 4GB of DRAM and 64GB eMMC. > The DRAM chips require a different configuration when compared to the > OrangePi Zero2, we must not use read/write training and write leveling. > > Add a defconfig for the box, so that we can easily build U-Boot for it. > We synced the .dts file already from the kernel tree. > > Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec Best regards, Jernej > --- > configs/x96_mate_defconfig | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > create mode 100644 configs/x96_mate_defconfig > > diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig > new file mode 100644 > index 00000000000..4276f4f543b > --- /dev/null > +++ b/configs/x96_mate_defconfig > @@ -0,0 +1,15 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_SUNXI=y > +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-x96-mate" > +CONFIG_SPL=y > +CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y > +CONFIG_MACH_SUN50I_H616=y > +CONFIG_MMC0_CD_PIN="PF6" > +CONFIG_R_I2C_ENABLE=y > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > +CONFIG_SPL_I2C=y > +CONFIG_SPL_SYS_I2C_LEGACY=y > +CONFIG_SYS_I2C_MVTWSI=y > +CONFIG_SYS_I2C_SLAVE=0x7f > +CONFIG_SYS_I2C_SPEED=400000 > +CONFIG_SUPPORT_EMMC_BOOT=y > -- > 2.25.1