[U-Boot-Users] Resubmit : [PATCH] Correct ARM Versatile Timer Initialization

[U-Boot-Users] Resubmit : [PATCH] Correct ARM Versatile Timer Initialization

[Gururaja Hebbar K R]

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
---
 cpu/arm926ejs/versatile/timer.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/cpu/arm926ejs/versatile/timer.c
b/cpu/arm926ejs/versatile/timer.c
index 32872d2..9659b67 100644
--- a/cpu/arm926ejs/versatile/timer.c
+++ b/cpu/arm926ejs/versatile/timer.c
@@ -50,8 +50,7 @@ static ulong lastdec;
 int timer_init (void)
 {
 	*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;
/* TimerLoad */
-	*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;
/* TimerValue */
-	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
+	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x80;
 
 	/* init the timestamp and lastdec value */
 	reset_timer_masked();
-- 
1.5.6.4

[U-Boot-Users] Re submit : [PATCH] Correct ARM Versatile Timer Initialization

[Hebbar]

Hi,

The above is Because of Below Reasons.

- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271), 
---Timer Value Register @ TIMER Base + 4 is Read-only. So removed code which
     writes to this register
---Prescale Value (Bits 3-2 of TIMER Control register) can only be one of 
    00,01,10.  The Value 11 is undefined. So This Patch Changes it to 00.

Comments are welcome.

Regards
Gururaja
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[U-Boot-Users] Resubmit : [PATCH] Correct ARM Versatile Timer Initialization

[Wolfgang Denk]

In message <5BF78BCE8D9BF14A83F836BD9E3916BA23C1F7@blrms.slti.sanyo.co.in> you wrote:
> Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
> ---
>  cpu/arm926ejs/versatile/timer.c |    3 +--
>  1 files changed, 1 insertions(+), 2 deletions(-)
> 
> diff --git a/cpu/arm926ejs/versatile/timer.c
> b/cpu/arm926ejs/versatile/timer.c
> index 32872d2..9659b67 100644
> --- a/cpu/arm926ejs/versatile/timer.c
> +++ b/cpu/arm926ejs/versatile/timer.c
> @@ -50,8 +50,7 @@ static ulong lastdec;
>  int timer_init (void)
>  {
>  	*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;
> /* TimerLoad */
^^^^^^^^^^^^^^^^^
> -	*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;
> /* TimerValue */
^^^^^^^^^^^^^^^^^

Just for the record: this patch is once more corrupted due to line
wrapping by the mailer.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
There are three ways to get something  done:  do  it  yourself,  hire
someone, or forbid your kids to do it.

[U-Boot-Users] Re submit : [PATCH] Correct ARM Versatile Timer Initialization

[Wolfgang Denk]

In message <18768421.post@talk.nabble.com> you wrote:
> 
> The above is Because of Below Reasons.
> 
> - According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271), 
> ---Timer Value Register @ TIMER Base + 4 is Read-only. So removed code which
>      writes to this register
> ---Prescale Value (Bits 3-2 of TIMER Control register) can only be one of 
>     00,01,10.  The Value 11 is undefined. So This Patch Changes it to 00.

Please include such information with the patch it refers to.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Nearly everyone is in favor of going  to  heaven  but  too  many  are
hoping  they'll  live  long  enough  to see an easing of the entrance
requirements. Never appeal to a man's "better nature." he  might  not
have one.