From: Robert Schwebel <robert@schwebel.de>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] need help for LAN91C111 driver
Date: Tue, 28 Oct 2003 14:28:02 +0100 [thread overview]
Message-ID: <20031028132802.GN30659@pengutronix.de> (raw)
In-Reply-To: <03102814034202.02205@pcj86>
On Tue, Oct 28, 2003 at 02:03:42PM +0100, Stephan Linz wrote:
> PHY_INT_REG is an read only register (all bits). So I don't understand the
> write access -- Why? Can anybody explain this step?
>
> I think the corregt register have to be PHY_MASK_REG (register 19), which
> correspond to PHY_INT_REG (register 18) as interrupt mask.
I assume you are right - at least that is how we have fixed it in our
-ptx patch. Unfortunately I didn't find the time to push everything
upstream yet :-(
Robert
--
Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
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next prev parent reply other threads:[~2003-10-28 13:28 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-10-28 13:03 [U-Boot-Users] need help for LAN91C111 driver Stephan Linz
2003-10-28 13:28 ` Robert Schwebel [this message]
2003-10-28 13:47 ` Stephan Linz
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