From mboxrd@z Thu Jan 1 00:00:00 1970 From: Robert Schwebel Date: Tue, 28 Oct 2003 14:28:02 +0100 Subject: [U-Boot-Users] need help for LAN91C111 driver In-Reply-To: <03102814034202.02205@pcj86> References: <03102814034202.02205@pcj86> Message-ID: <20031028132802.GN30659@pengutronix.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, Oct 28, 2003 at 02:03:42PM +0100, Stephan Linz wrote: > PHY_INT_REG is an read only register (all bits). So I don't understand the > write access -- Why? Can anybody explain this step? > > I think the corregt register have to be PHY_MASK_REG (register 19), which > correspond to PHY_INT_REG (register 18) as interrupt mask. I assume you are right - at least that is how we have fixed it in our -ptx patch. Unfortunately I didn't find the time to push everything upstream yet :-( Robert -- Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de Pengutronix - Linux Solutions for Science and Industry Handelsregister: Amtsgericht Hildesheim, HRA 2686 Hornemannstra?e 12, 31137 Hildesheim, Germany Phone: +49-5121-28619-0 | Fax: +49-5121-28619-4