From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Leeman Date: Tue, 11 May 2004 10:29:25 +0200 Subject: [U-Boot-Users] [patch] master read fix mpc8245 Message-ID: <20040511082925.GD14935@smtp.barco.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Reading PPC Memory from another device with the PPC as PCI target device corrupts data due to interenal hardware buffering. Fix to disable these buffers with no performance influence. a detailed description is available upon request (pdf, mailinglist bounces). -------------- next part -------------- --- u-boot-1.1.1.orig/cpu/mpc824x/cpu_init.c 2003-06-27 23:32:33.000000000 +0200 +++ u-boot-1.1.1/cpu/mpc824x/cpu_init.c 2004-05-10 14:08:17.000000000 +0200 @@ -102,7 +102,25 @@ cpu_init_f (void) CONFIG_WRITE_BYTE(AMBOR, val & 0xDF); CONFIG_WRITE_BYTE(AMBOR, val | 0x20); CONFIG_WRITE_BYTE(AMBOR, val & 0xDF); +#ifdef CONFIG_MPC8245 + /* silicon bug 28 MPC8245 */ + CONFIG_READ_BYTE(AMBOR,val); + CONFIG_WRITE_BYTE(AMBOR,val|0x1); + + CONFIG_READ_BYTE(PCMBCR,val); + /* in order not to corrupt data which is being read over the PCI bus + * with the PPC as master, we need to reduce the number of PCMRBs to 1, + * 4.11 in the processor user manual + * */ +#if 1 + CONFIG_WRITE_BYTE(PCMBCR,(val|0xC0)); /* 1 PCMRB */ +#else + CONFIG_WRITE_BYTE(PCMBCR,(val|0x80)); /* 2 PCMRBs */ + CONFIG_WRITE_BYTE(PCMBCR,(val|0x40)); /* 3 PCMRBs */ +#endif +#endif + CONFIG_READ_WORD(PICR1, val); #if defined(CONFIG_MPC8240) CONFIG_WRITE_WORD( PICR1, -------------- next part -------------- --- u-boot-1.1.1.orig/include/mpc824x.h 2002-11-03 01:33:12.000000000 +0100 +++ u-boot-1.1.1/include/mpc824x.h 2004-05-10 14:03:56.000000000 +0200 @@ -297,6 +297,7 @@ #define PBESR 0x800000c7 /* PCI Bus Error Status Register */ #define PBEAR 0x800000c8 /* Processor/PCI Bus Error Status Register */ #define AMBOR 0x800000e0 /* Address Map B Options Register */ +#define PCMBCR 0x800000e1 /* PCI/Memory Buffer Copnfiguration */ #define MCCR1 0x800000f0 /* Memory Control Configuration Register 1 */ #define MCCR2 0x800000f4 /* Memory Control Configuration Register 2 */ #define MCCR3 0x800000f8 /* Memory Control Configuration Register 3 */ -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: Digital signature Url : http://lists.denx.de/pipermail/u-boot/attachments/20040511/b9982a7e/attachment.pgp