[U-Boot-Users] [PATCH] ARM720t -- Relocating Exception Vectors

[U-Boot-Users] [PATCH] ARM720t -- Relocating Exception Vectors

[Curt Brune]

This patch is for cpu/arm720t/start.S -- The patch relocates the
exception vectors to RAM address 0x0.

See previous posting about relocating ARM exception vectors for a
discussion of the problem.

Cheers,
Curt

-- 

========================================================================
 Curt Brune           | Phone   1.650.380.2528 |     Managing Principal
 curt at cucy.com        | WWW       www.cucy.com |           Cucy Systems
========================================================================
             Cucy Systems -- Software. Integration. Training.
========================================================================
-------------- next part --------------
diff -purN new/u-boot/cpu/arm720t/start.S u-boot/cpu/arm720t/start.S
--- new/u-boot/cpu/arm720t/start.S	2004-07-01 09:30:47.000000000 -0700
+++ u-boot/cpu/arm720t/start.S	2004-07-06 16:57:34.000000000 -0700
@@ -160,6 +160,35 @@ clbss_l:str	r2, [r0]		/* clear loop...  
 	cmp	r0, r1
 	bne	clbss_l
 
+	/* 
+	 * When using interrupts make sure the exception vectors are
+	 * at address 0x0.  It's possible that u-boot was relocated
+	 * from FLASH (address 0x0) to RAM (address TEXT_BASE) and the
+	 * FLASH re-mapped elsewhere.  In this case the exception
+	 * vectors would no longer be at address 0x0, they would be
+	 * where ever FLASH and RAM were re-mapped to.
+	 */
+	ldr     r0, _TEXT_BASE
+	ldr     r1, =0x0
+	cmp     r0, r1                  /* everything is fine if TEXT_BASE is 0x0 */
+	beq     go_start
+
+	/* 
+	 * Otherwise copy the exception vectors (and associated data)
+	 * from flash to 0x0.
+	 */
+	adr r2, _start		
+	adr r3, _fiq
+	sub r2, r3, r2
+	add r2, r2, #8
+
+vec_copy_loop:
+	ldr     r4, [r0], #4
+	str     r4, [r1], #4
+	cmp	r2, r1
+	bne	vec_copy_loop
+	
+go_start:
 	ldr	pc, _start_armboot
 
 _start_armboot:	.word start_armboot

[U-Boot-Users] [PATCH] ARM720t -- Relocating Exception Vectors

[Friedrich, Lars]

> Subject: [U-Boot-Users] [PATCH] ARM720t -- Relocating 
> Exception Vectors
> 
> This patch is for cpu/arm720t/start.S -- The patch relocates the
> exception vectors to RAM address 0x0.

No offense, but this is a bad hack. The copy code belongs from
a 'structured' point of view to where the relocation is done and not
just attached to the end of the source code.
And from an 'optimized code' point of view it belongs there, too, as
_TEXT_BASE is already loaded there into an register for example,
no need to do this multiple times. I don't quite see the necessarity
for a loop, too. There are 7 exception vectors, never more, never less.
The copy procedure can be handled by a single ldmia/stmia pair.

Best regards,
Lars Friedrich

-- 

[U-Boot-Users] [PATCH] ARM720t -- Relocating Exception Vectors

[Curt Brune]

On Wed, Jul 07, 2004 at 09:21:08AM +0200, Friedrich, Lars wrote:
> > 
> > This patch is for cpu/arm720t/start.S -- The patch relocates the
> > exception vectors to RAM address 0x0.
> 
> No offense, but this is a bad hack. The copy code belongs from

I see your point -- thanks for the advice.  I will submit a new patch
incorporating your advice.

Everyone, please ignore this patch.

Cheers,
Curt

-- 

========================================================================
 Curt Brune           | Phone   1.650.380.2528 |     Managing Principal
 curt at cucy.com        | WWW       www.cucy.com |           Cucy Systems
========================================================================
             Cucy Systems -- Software. Integration. Training.
========================================================================

[U-Boot-Users] [PATCH] ARM720t -- Relocating Exception Vectors

[Curt Brune]

Attached is a new patch for relocating the exception vectors, which
addresses your concerns:

On Wed, Jul 07, 2004 at 09:21:08AM +0200, Friedrich, Lars wrote:
> No offense, but this is a bad hack. The copy code belongs from
> a 'structured' point of view to where the relocation is done and not
> just attached to the end of the source code.

Agreed -- moved the vector relocation code to where the main
relocation resides.

> And from an 'optimized code' point of view it belongs there, too, as
> _TEXT_BASE is already loaded there into an register for example,
> no need to do this multiple times. I don't quite see the necessarity
> for a loop, too. There are 7 exception vectors, never more, never less.
> The copy procedure can be handled by a single ldmia/stmia pair.

Almost -- I also need to copy the 7 words after the vectors that
contain the absolute addresses of the exception handlers.  In total
that takes two ldmia/stmia pairs.

Thanks for the criticism -- the code is a bit tighter now (down to 7
instructions from 14, no branches and no loops).

Cheers,
Curt

-- 

========================================================================
 Curt Brune           | Phone   1.650.380.2528 |     Managing Principal
 curt at cucy.com        | WWW       www.cucy.com |           Cucy Systems
========================================================================
             Cucy Systems -- Software. Integration. Training.
========================================================================
-------------- next part --------------
diff -purN new/u-boot/cpu/arm720t/start.S u-boot/cpu/arm720t/start.S
--- new/u-boot/cpu/arm720t/start.S	Thu Jul  1 09:30:47 2004
+++ u-boot/cpu/arm720t/start.S	Wed Jul  7 10:17:33 2004
@@ -129,6 +129,14 @@ relocate:				/* relocate U-Boot to RAM	 
 	cmp     r0, r1                  /* don't reloc during debug         */
 	beq     stack_setup
 
+	ldr     r2, =0x0		/* Relocate the exception vectors   */
+	cmp     r1, r2                  /* and associated data to address   */
+	ldmneia	r0!, {r3-r10}           /* 0x0. Do nothing if TEXT_BASE is  */
+	stmneia	r2!, {r3-r10}		/* 0x0. Copy the first 15 words.    */
+	ldmneia	r0, {r3-r9}             
+	stmneia	r2, {r3-r9}		
+	adrne	r0, _start		/* restore r0                       */
+	
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
 	sub	r2, r3, r2		/* r2 <- size of armboot            */