From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gleb Natapov Date: Tue, 7 Sep 2004 12:03:00 +0300 Subject: [U-Boot-Users] [PATCH] mpc824x: set PCI latency timer to a sane value. Message-ID: <20040907090259.GC6392@nbase.co.il> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de It is 0 after reset. -- Gleb. -------------- next part -------------- Index: cpu/mpc824x/cpu_init.c =================================================================== RCS file: /cvsroot/u-boot/u-boot/cpu/mpc824x/cpu_init.c,v retrieving revision 1.4 diff -u -r1.4 cpu_init.c --- cpu/mpc824x/cpu_init.c 1 Aug 2004 22:48:20 -0000 1.4 +++ cpu/mpc824x/cpu_init.c 7 Sep 2004 08:56:45 -0000 @@ -90,7 +90,7 @@ #endif CONFIG_WRITE_BYTE(PCLSR, 0x8); /* set PCI cache line size */ - + CONFIG_WRITE_BYTE (PLTR, 0x40); /* set PCI latency timer */ /* * Note that although this bit is cleared after a hard reset, it * must be explicitly set and then cleared by software during