* [U-Boot-Users] MII PHY
@ 2004-12-26 21:24 Richard Klingler
2004-12-27 8:27 ` richard at uclinux.net
0 siblings, 1 reply; 4+ messages in thread
From: Richard Klingler @ 2004-12-26 21:24 UTC (permalink / raw)
To: u-boot
Evening (o;
Someone has a clue why using "miiphy_reset" and "miiphy_write"
would not work on a MPC852T board with DP83846A PHY?
Always gives "mii_send STUCK!" when I call through common/board.c
via "phy_reset" with PDDIR and PDPAR set correctly to 0x1fff.
Problem is that the DP83846 PHY comes up with "auto-negotiation"
set to on and "isolate" also set to on....so after resetting
the "isolate" bit it works just fine.
Any other nice place to place a PHY reset code?
best regards
rick
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot-Users] MII PHY
2004-12-26 21:24 Richard Klingler
@ 2004-12-27 8:27 ` richard at uclinux.net
0 siblings, 0 replies; 4+ messages in thread
From: richard at uclinux.net @ 2004-12-27 8:27 UTC (permalink / raw)
To: u-boot
Never mind (o;
> Evening (o;
>
>
> Someone has a clue why using "miiphy_reset" and "miiphy_write"
> would not work on a MPC852T board with DP83846A PHY?
>
> Always gives "mii_send STUCK!" when I call through common/board.c
> via "phy_reset" with PDDIR and PDPAR set correctly to 0x1fff.
>
>
> Problem is that the DP83846 PHY comes up with "auto-negotiation"
> set to on and "isolate" also set to on....so after resetting
> the "isolate" bit it works just fine.
>
>
> Any other nice place to place a PHY reset code?
>
PHY has hardwired address of "0" which means "isolate"
for all PHYs I think. Working perfectly now (o;
Now only board specific FPGA and PCMCIA code is missing
for finishing the com2gether Opus103 support.
rick
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot-Users] MII PHY
@ 2004-12-27 8:39 Yu JunMiao-r61929
2004-12-27 15:34 ` Yanjun Luo
0 siblings, 1 reply; 4+ messages in thread
From: Yu JunMiao-r61929 @ 2004-12-27 8:39 UTC (permalink / raw)
To: u-boot
Any one who can tell me where to download the MII specification?
Thx!
-----Original Message-----
From: u-boot-users-admin@lists.sourceforge.net [mailto:u-boot-users-admin at lists.sourceforge.net] On Behalf Of richard at uclinux.net
Sent: 2004?12?27? 16:27
To: u-boot-users at lists.sourceforge.net
Subject: Re: [U-Boot-Users] MII PHY
Never mind (o;
> Evening (o;
>
>
> Someone has a clue why using "miiphy_reset" and "miiphy_write" would
> not work on a MPC852T board with DP83846A PHY?
>
> Always gives "mii_send STUCK!" when I call through common/board.c via
> "phy_reset" with PDDIR and PDPAR set correctly to 0x1fff.
>
>
> Problem is that the DP83846 PHY comes up with "auto-negotiation" set
> to on and "isolate" also set to on....so after resetting the "isolate"
> bit it works just fine.
>
>
> Any other nice place to place a PHY reset code?
>
PHY has hardwired address of "0" which means "isolate"
for all PHYs I think. Working perfectly now (o;
Now only board specific FPGA and PCMCIA code is missing
for finishing the com2gether Opus103 support.
rick
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot-Users] MII PHY
2004-12-27 8:39 [U-Boot-Users] MII PHY Yu JunMiao-r61929
@ 2004-12-27 15:34 ` Yanjun Luo
0 siblings, 0 replies; 4+ messages in thread
From: Yanjun Luo @ 2004-12-27 15:34 UTC (permalink / raw)
To: u-boot
On Mon, 27 Dec 2004 16:39:27 +0800, Yu JunMiao-r61929 wrote
> Any one who can tell me where to download the MII specification?
> Thx!
I think you don't need to study MII's specification.
Please study your CPU's and your PHY's datasheet.
Some CPU have a dedicate pin as MDIO MDCK to operate PHY,
others you must use GPIO to control PHY's register.
That's enough I think.
Regards,
Luo Yanjun.
^ permalink raw reply [flat|nested] 4+ messages in thread
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2004-12-27 8:39 [U-Boot-Users] MII PHY Yu JunMiao-r61929
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2004-12-26 21:24 Richard Klingler
2004-12-27 8:27 ` richard at uclinux.net
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