From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Mon, 7 Nov 2005 10:00:30 +0100 Subject: [U-Boot-Users] Time Base register definitions inccorrect in asm-ppc/processor.h In-Reply-To: References: Message-ID: <200511071000.31398.sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Mike, On Saturday 05 November 2005 18:43, Mike Wellington wrote: > In include/asm-ppc/processor.h the definitions for the > Time Base Upper and Lower registers are incorrect for the > PPC440GX. > > > #define SPRN_TBRL 0x10D /* Time Base Read Lower Register */ > #define SPRN_TBRU 0x10C /* Time Base Read Upper Register */ > #define SPRN_TBWL 0x11D /* Time Base Write Lower Register */ > #define SPRN_TBWU 0x11C /* Time Base Write Upper Register */ > > i fixed this in my own code by adding the following ifdef: > > #ifdef CONFIG_440GX > #define SPRN_TBRL 0x10C /* Time Base Read Lower Register */ > #define SPRN_TBRU 0x10D /* Time Base Read Upper Register */ > #define SPRN_TBWL 0x11C /* Time Base Write Lower Register */ > #define SPRN_TBWU 0x11D /* Time Base Write Upper Register */ > #else > #define SPRN_TBRL 0x10D /* Time Base Read Lower Register */ > #define SPRN_TBRU 0x10C /* Time Base Read Upper Register */ > #define SPRN_TBWL 0x11D /* Time Base Write Lower Register */ > #define SPRN_TBWU 0x11C /* Time Base Write Upper Register */ > #endif After a quick look in some other ppc manuals (AMCC and Freescale) this seems to be not only a 440GX problem, but a generic ppc problem. I will prepare a patch for this. I didn't find any code referencing these registers. Do you have an command/application using these timebase regsisters, which could be interesting for the community? If so, please share it it with us. And please submit a proper patch next time (CHANGELOG, etc...) Best regards, Stefan