[U-Boot-Users] PPC405EP CPC0_PCI init vs. update

[U-Boot-Users] PPC405EP CPC0_PCI init vs. update

[Scott McNutt]

Hi All,

In cpu/ppc4xx/start.S, the CPC0_PCI register is _initialized_,
rather than being simply _updated_. This clears bits that are
set during bootstrap from a serial eeprom. E.g. for the
PerWE/PCI_INT mux, CPC0_PCI[SPE] always gets cleared.

I'm proposing a simple change and would like some feedback ...
it's not clear to me if this will cause problems for existing
boards.

Comments welcome :-)

Regards,
--Scott
===============================================================
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1539,7 +1539,8 @@ ppc405ep_init:
         mtdcr   ebccfgd,r3
  #endif

-       addi    r3,0,CPC0_PCI_HOST_CFG_EN
+       mfdcr   r3, CPC0_PCI
+       ori     r3,r3,CPC0_PCI_HOST_CFG_EN
  #ifdef CONFIG_BUBINGA
         /*
 
!-----------------------------------------------------------------------

[U-Boot-Users] PPC405EP CPC0_PCI init vs. update

[Stefan Roese]

Hi Scott,

On Tuesday 06 December 2005 13:45, Scott McNutt wrote:
> In cpu/ppc4xx/start.S, the CPC0_PCI register is _initialized_,
> rather than being simply _updated_. This clears bits that are
> set during bootstrap from a serial eeprom. E.g. for the
> PerWE/PCI_INT mux, CPC0_PCI[SPE] always gets cleared.
>
> I'm proposing a simple change and would like some feedback ...
> it's not clear to me if this will cause problems for existing
> boards.
>
> Comments welcome :-)

Seems reasonable to me. I second this patch. Most likely, the current 405ep 
platforms need those bits cleared or configure them in some board specific 
code.

If nobody objects, I will check your patch in, in a few days/weeks...

Best regards,
Stefan