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* [U-Boot-Users] [PATCH] Correct register for pci async mode on PPC440EP
@ 2005-12-08  8:35 Youngchul Bang
  2005-12-10  8:02 ` Stefan Roese
  0 siblings, 1 reply; 2+ messages in thread
From: Youngchul Bang @ 2005-12-08  8:35 UTC (permalink / raw)
  To: u-boot

Hi, Stefan

This patch fixes the register for PCI async mode configuration information.

Best regards,
Youngchul Bang


diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index a463053..a26533c 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -57,7 +57,7 @@ int pci_async_enabled(void)
 #if defined(CONFIG_440EP) || defined(CONFIG_440GR)
        unsigned long val;

-       mfsdr(cpc0_strp1, val);
+       mfsdr(sdr_sdstp1, val);
        return (val & SDR0_SDSTP1_PAME_MASK);
 #endif
 }

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2005-12-08  8:35 [U-Boot-Users] [PATCH] Correct register for pci async mode on PPC440EP Youngchul Bang
2005-12-10  8:02 ` Stefan Roese

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