From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wolfgang Denk Date: Mon, 29 May 2006 00:24:14 +0200 Subject: [U-Boot-Users] MPC83xx data cache lock? In-Reply-To: Your message of "Fri, 26 May 2006 13:33:45 +0800." <9FCDBA58F226D911B202000BDBAD4673026FD91C@zch01exm40.ap.freescale.net> Message-ID: <20060528222414.E393D353B06@atlas.denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de In message <9FCDBA58F226D911B202000BDBAD4673026FD91C@zch01exm40.ap.freescale.net> you wrote: > > Here has one patch can make DMA performance improved 6x. > This patch make DMA with cache line burst read and burst write > from/to DDR memory. Sorry, can you please resubmit to provide a proper patch? Please see the README for instructions. And please don't top-post / full quote. Best regards, Wolfgang Denk -- Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de You don't need a weatherman to know which way the wind blows. - Bob Dylan