[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Hello Ed Okerson,

Recently, Roy Zang released MPC7448 HPC-II
platform support to this list and found a
CFI Flash driver problem - North-bridge
chip TSI108 working as little-endian but write
to Flash is byte-swapped in a wrong way. 
The workaround is to enable 
CFG_FLASH_USE_BUFFER_WRITE in little endian 
setting. However, CFG_FLASH_USE_BUFFER_WRITE
should have nothing to do with little endian
if I am right. So I suspect flash writing
with little endian could have some problems.

Once I removed little endian stuff in 
flash_add_byte(), CFI Driver was funtional
for MPC7448 HPC-II with/without 
CFG_FLASH_USE_BUFFER_WRITE. So I'd like to 
make sure whether my fix is a general thing 
or just a luck. 

Thanks,

Sam


	

	
		
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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Wolfgang Denk]

Dear Sam,

in message <20060804123231.77800.qmail@web15908.mail.cnb.yahoo.com> you wrote:
> 
> Once I removed little endian stuff in 
> flash_add_byte(), CFI Driver was funtional
> for MPC7448 HPC-II with/without 
> CFG_FLASH_USE_BUFFER_WRITE. So I'd like to 
> make sure whether my fix is a general thing 
> or just a luck. 

Ummm... did you try running the resulting code on any real LE system?

>  static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
>  {
> -#if defined(__LITTLE_ENDIAN)
> -	unsigned short	w;
> -	unsigned int	l;
> -	unsigned long long ll;
> -#endif
...

I understand that removing this code  will  break  all  real  little-
endian systems.

> diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
> index ea5b0d2..3d3c96f 100644
> --- a/include/asm-ppc/processor.h
> +++ b/include/asm-ppc/processor.h
> @@ -12,6 +12,12 @@ #include <linux/config.h>
>  #include <asm/ptrace.h>
>  #include <asm/types.h>
>  
> +#ifdef  CONFIG_MPC7448HPC2
> +#ifndef __LITTLE_ENDIAN
> +#define __LITTLE_ENDIAN
> +#endif  /* __LITTLE_ENDIAN ** USI-SS  */
> +#endif  /* CONFIG_MPC7448HPC2 */
> +

And this is definitely inappropirate, too.  All  PowerPC  systems  we
have  so  far  are BE, including yours, event hough it performs funny
(read: broken) memory accesses.

Defining __LITTLE_ENDIAN on  a  big-endian  system  is  fundamentally
broken. I will never accept such a patch.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Crash programs fail because they are based on the theory  that,  with
nine women pregnant, you can get a baby a month.  - Wernher von Braun

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Wolfgang Denk <wd@denx.de> wrote:
> Ummm... did you try running the resulting code on
> any real LE system?

No. I have no such a platform. I'd like to get
any feedback from LE real test.

> I understand that removing this code  will  break 
> all  real  little-
> endian systems.

If so, then drop my fixes. The puzzle to me
is the difference between TSI108 working
as LE mode and a real LE case.

> > +#ifdef  CONFIG_MPC7448HPC2
> > +#ifndef __LITTLE_ENDIAN
> > +#define __LITTLE_ENDIAN
[snip] 
> Defining __LITTLE_ENDIAN on  a  big-endian  system 
> is  fundamentally
> broken. I will never accept such a patch.

Ummm, it's just my RFC hack. Should haven't 
released it to list.

Thanks,

Sam


	

	
		
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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Yuli Barcohen]

Sounds like it's the (in)famous byte lanes swapping issue. It's so
common that Linux MTD code even includes support for this. There are
even more problematic flashes like Spansion S70GL256M which consists of
two parts, one big-endian and another little-endian. I had to support
the lanes swapping (and even the "mixed-endian") on many customers'
boards. I've attached to this mail the CFI driver version which I
use. It works well on many PowerPC boards but I've got no little-endian
system to test it (my tree is not fully merged with official GIT right
now so I'm not sending a patch, I can prepare one if you think the
approach is OK).

-- 
========================================================================
 Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project Leader
 yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software, Israel
========================================================================
-------------- next part --------------
/*
 * (C) Copyright 2002-2004
 * Brad Kemp, Seranoa Networks, Brad.Kemp at seranoa.com
 *
 * Copyright (C) 2003, 2006 Arabella Software Ltd.
 * Yuli Barcohen <yuli@arabellasw.com>
 * Modified to work with AMD flashes
 * Added support for byte lanes swap
 * Added support for 32-bit chips consisting of two 16-bit devices
 * (for example, S70GL256M00)
 *
 * Copyright (C) 2004
 * Ed Okerson
 * Modified to work with little-endian systems.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 * History
 * 01/20/2004 - combined variants of original driver.
 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
 * 01/27/2004 - Little endian support Ed Okerson
 *
 * Tested Architectures
 * Port Width  Chip Width    # of banks	   Flash Chip  Board
 * 32	       16	     1		   28F128J3    seranoa/eagle
 * 64	       16	     1		   28F128J3    seranoa/falcon
 *
 */

/* The DEBUG define must be before common to enable debugging */
/* #define DEBUG	*/

#include <common.h>

#ifdef	CFG_FLASH_CFI_DRIVER

#include <watchdog.h>
#include <asm/processor.h>
#include <asm/byteorder.h>
#include <environment.h>

/*
 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
 * The width of the port and the width of the chips are determined at initialization.
 * These widths are used to calculate the address for access CFI data structures.
 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
 *
 * References
 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
 *
 * TODO
 *
 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
 * Table (ALT) to determine if protection is available
 *
 * Add support for other command sets Use the PRI and ALT to determine command set
 * Verify erase and program timeouts.
 */

#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
#define CFG_FLASH_CFI_SWAP
#endif

#ifndef CFG_FLASH_BANKS_LIST
#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
#endif

#define FLASH_CMD_CFI			0x98
#define FLASH_CMD_READ_ID		0x90
#define FLASH_CMD_RESET			0xff
#define FLASH_CMD_BLOCK_ERASE		0x20
#define FLASH_CMD_ERASE_CONFIRM		0xD0
#define FLASH_CMD_WRITE			0x40
#define FLASH_CMD_PROTECT		0x60
#define FLASH_CMD_PROTECT_SET		0x01
#define FLASH_CMD_PROTECT_CLEAR		0xD0
#define FLASH_CMD_CLEAR_STATUS		0x50
#define FLASH_CMD_WRITE_TO_BUFFER	0xE8
#define FLASH_CMD_WRITE_BUFFER_CONFIRM	0xD0

#define FLASH_STATUS_DONE		0x80
#define FLASH_STATUS_ESS		0x40
#define FLASH_STATUS_ECLBS		0x20
#define FLASH_STATUS_PSLBS		0x10
#define FLASH_STATUS_VPENS		0x08
#define FLASH_STATUS_PSS		0x04
#define FLASH_STATUS_DPS		0x02
#define FLASH_STATUS_R			0x01
#define FLASH_STATUS_PROTECT		0x01

#define AMD_CMD_RESET			0xF0
#define AMD_CMD_WRITE			0xA0
#define AMD_CMD_ERASE_START		0x80
#define AMD_CMD_ERASE_SECTOR		0x30
#define AMD_CMD_UNLOCK_START		0xAA
#define AMD_CMD_UNLOCK_ACK		0x55
#define AMD_CMD_WRITE_TO_BUFFER		0x25
#define AMD_CMD_WRITE_BUFFER_CONFIRM	0x29

#define AMD_STATUS_TOGGLE		0x40
#define AMD_STATUS_ERROR		0x20

#define AMD_ADDR_ERASE_START	((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
#define AMD_ADDR_START		((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
#define AMD_ADDR_ACK		((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)

#define FLASH_OFFSET_CFI		0x55
#define FLASH_OFFSET_CFI_RESP		0x10
#define FLASH_OFFSET_PRIMARY_VENDOR	0x13
#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR	0x15	/* extended query table primary addr */
#define FLASH_OFFSET_WTOUT		0x1F
#define FLASH_OFFSET_WBTOUT		0x20
#define FLASH_OFFSET_ETOUT		0x21
#define FLASH_OFFSET_CETOUT		0x22
#define FLASH_OFFSET_WMAX_TOUT		0x23
#define FLASH_OFFSET_WBMAX_TOUT		0x24
#define FLASH_OFFSET_EMAX_TOUT		0x25
#define FLASH_OFFSET_CEMAX_TOUT		0x26
#define FLASH_OFFSET_SIZE		0x27
#define FLASH_OFFSET_INTERFACE		0x28
#define FLASH_OFFSET_BUFFER_SIZE	0x2A
#define FLASH_OFFSET_NUM_ERASE_REGIONS	0x2C
#define FLASH_OFFSET_ERASE_REGIONS	0x2D
#define FLASH_OFFSET_PROTECT		0x02
#define FLASH_OFFSET_USER_PROTECTION	0x85
#define FLASH_OFFSET_INTEL_PROTECTION	0x81


#define FLASH_MAN_CFI			0x01000000

#define CFI_CMDSET_NONE		    0
#define CFI_CMDSET_INTEL_EXTENDED   1
#define CFI_CMDSET_AMD_STANDARD	    2
#define CFI_CMDSET_INTEL_STANDARD   3
#define CFI_CMDSET_AMD_EXTENDED	    4
#define CFI_CMDSET_MITSU_STANDARD   256
#define CFI_CMDSET_MITSU_EXTENDED   257
#define CFI_CMDSET_SST		    258


#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
# undef  FLASH_CMD_RESET
# define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
#endif


typedef union {
	unsigned char c;
	unsigned short w;
	unsigned long l;
	unsigned long long ll;
} cfiword_t;

typedef union {
	volatile unsigned char *cp;
	volatile unsigned short *wp;
	volatile unsigned long *lp;
	volatile unsigned long long *llp;
} cfiptr_t;

#define NUM_ERASE_REGIONS 4

/* use CFG_MAX_FLASH_BANKS_DETECT if defined */
#ifdef CFG_MAX_FLASH_BANKS_DETECT
static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];	/* FLASH chips info */
#else
static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];		/* FLASH chips info */
#endif

/*
 * Check if chip width is defined. If not, start detecting with 8bit.
 */
#ifndef CFG_FLASH_CFI_WIDTH
#define CFG_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#endif


/*-----------------------------------------------------------------------
 * Functions
 */

typedef unsigned long flash_sect_t;

static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
static int flash_detect_cfi (flash_info_t * info);
static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
				    ulong tout, char *prompt);
ulong flash_get_size (ulong base, int banknum);
#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
static flash_info_t *flash_get_info(ulong base);
#endif
#ifdef CFG_FLASH_USE_BUFFER_WRITE
static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
#endif

/*-----------------------------------------------------------------------
 * create an address based on the offset and the port width
 */
inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
{
	return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
}

#ifdef DEBUG
/*-----------------------------------------------------------------------
 * Debug support
 */
void print_longlong (char *str, unsigned long long data)
{
	int i;
	char *cp;

	cp = (unsigned char *) &data;
	for (i = 0; i < 8; i++)
		sprintf (&str[i * 2], "%2.2x", *cp++);
}
static void flash_printqry (flash_info_t * info, flash_sect_t sect)
{
	cfiptr_t cptr;
	int x, y;

	for (x = 0; x < 0x40; x += 16U / info->portwidth) {
		cptr.cp =
			flash_make_addr (info, sect,
					 x + FLASH_OFFSET_CFI_RESP);
		debug ("%p : ", cptr.cp);
		for (y = 0; y < 16; y++) {
			debug ("%2.2x ", cptr.cp[y]);
		}
		debug (" ");
		for (y = 0; y < 16; y++) {
			if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
				debug ("%c", cptr.cp[y]);
			} else {
				debug (".");
			}
		}
		debug ("\n");
	}
}
#endif


/*-----------------------------------------------------------------------
 * read a character@a port width address
 */
inline uchar flash_read_uchar (flash_info_t * info, uint offset)
{
	uchar *cp;

	cp = flash_make_addr (info, 0, offset);
#if defined(CFG_FLASH_CFI_SWAP)
	return (cp[0]);
#else
	return (cp[info->portwidth - 1]);
#endif
}

/*-----------------------------------------------------------------------
 * read a short word by swapping for ppc format.
 */
ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
{
	uchar *addr;
	ushort retval;

#ifdef DEBUG
	int x;
#endif
	addr = flash_make_addr (info, sect, offset);

#ifdef DEBUG
	debug ("ushort addr is at %p info->portwidth = %d\n", addr,
	       info->portwidth);
	for (x = 0; x < 2 * info->portwidth; x++) {
		debug ("addr[%x] = 0x%x\n", x, addr[x]);
	}
#endif
#if defined(CFG_FLASH_CFI_SWAP)
	retval = ((addr[(info->portwidth)] << 8) | addr[0]);
#else
	retval = ((addr[(2 * info->portwidth) - 1] << 8) |
		  addr[info->portwidth - 1]);
#endif

	debug ("retval = 0x%x\n", retval);
	return retval;
}

/*-----------------------------------------------------------------------
 * read a long word by picking the least significant byte of each maiximum
 * port size word. Swap for ppc format.
 */
ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
{
	uchar *addr;
	ulong retval;

#ifdef DEBUG
	int x;
#endif
	addr = flash_make_addr (info, sect, offset);

#ifdef DEBUG
	debug ("long addr is at %p info->portwidth = %d\n", addr,
	       info->portwidth);
	for (x = 0; x < 4 * info->portwidth; x++) {
		debug ("addr[%x] = 0x%x\n", x, addr[x]);
	}
#endif
#if defined(CFG_FLASH_CFI_SWAP)
	retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
		(addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
#else
	retval = (addr[(2 * info->portwidth) - 1] << 24) |
		(addr[(info->portwidth) - 1] << 16) |
		(addr[(4 * info->portwidth) - 1] << 8) |
		addr[(3 * info->portwidth) - 1];
#endif
	return retval;
}


/*-----------------------------------------------------------------------
 */
unsigned long flash_init (void)
{
	unsigned long size = 0;
	int i;

#ifdef CFG_FLASH_PROTECTION
	char *s = getenv("unlock");
#endif

	/* Init: no FLASHes known */
	for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
		flash_info[i].flash_id = FLASH_UNKNOWN;
		size += flash_info[i].size = flash_get_size (bank_base[i], i);
		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
#ifndef CFG_FLASH_QUIET_TEST
			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
				i, flash_info[i].size, flash_info[i].size << 20);
#endif /* CFG_FLASH_QUIET_TEST */
		}
#ifdef CFG_FLASH_PROTECTION
		else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
			/*
			 * Only the U-Boot image and it's environment is protected,
			 * all other sectors are unprotected (unlocked) if flash
			 * hardware protection is used (CFG_FLASH_PROTECTION) and
			 * the environment variable "unlock" is set to "yes".
			 */
			if (flash_info[i].legacy_unlock) {
				int k;

				/*
				 * Disable legacy_unlock temporarily, since
				 * flash_real_protect would relock all other sectors
				 * again otherwise.
				 */
				flash_info[i].legacy_unlock = 0;

				/*
				 * Legacy unlocking (e.g. Intel J3) -> unlock only one
				 * sector. This will unlock all sectors.
				 */
				flash_real_protect (&flash_info[i], 0, 0);

				flash_info[i].legacy_unlock = 1;

				/*
				 * Manually mark other sectors as unlocked (unprotected)
				 */
				for (k = 1; k < flash_info[i].sector_count; k++)
					flash_info[i].protect[k] = 0;
			} else {
				/*
				 * No legancy unlocking -> unlock all sectors
				 */
				flash_protect (FLAG_PROTECT_CLEAR,
					       flash_info[i].start[0],
					       flash_info[i].start[0] + flash_info[i].size - 1,
					       &flash_info[i]);
			}
		}
#endif /* CFG_FLASH_PROTECTION */
	}

	/* Monitor protection ON by default */
#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
	flash_protect (FLAG_PROTECT_SET,
		       CFG_MONITOR_BASE,
		       CFG_MONITOR_BASE + monitor_flash_len  - 1,
		       flash_get_info(CFG_MONITOR_BASE));
#endif

	/* Environment protection ON by default */
#ifdef CFG_ENV_IS_IN_FLASH
	flash_protect (FLAG_PROTECT_SET,
		       CFG_ENV_ADDR,
		       CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
		       flash_get_info(CFG_ENV_ADDR));
#endif

	/* Redundant environment protection ON by default */
#ifdef CFG_ENV_ADDR_REDUND
	flash_protect (FLAG_PROTECT_SET,
		       CFG_ENV_ADDR_REDUND,
		       CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
		       flash_get_info(CFG_ENV_ADDR_REDUND));
#endif
	return (size);
}

/*-----------------------------------------------------------------------
 */
#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
static flash_info_t *flash_get_info(ulong base)
{
	int i;
	flash_info_t * info = 0;

	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
		info = & flash_info[i];
		if (info->size && info->start[0] <= base &&
		    base <= info->start[0] + info->size - 1)
			break;
	}

	return i == CFG_MAX_FLASH_BANKS ? 0 : info;
}
#endif

/*-----------------------------------------------------------------------
 */
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
	int rcode = 0;
	int prot;
	flash_sect_t sect;

	if (info->flash_id != FLASH_MAN_CFI) {
		puts ("Can't erase unknown flash type - aborted\n");
		return 1;
	}
	if ((s_first < 0) || (s_first > s_last)) {
		puts ("- no sectors to erase\n");
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}
	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n", prot);
	} else {
		putc ('\n');
	}


	for (sect = s_first; sect <= s_last; sect++) {
		if (info->protect[sect] == 0) { /* not protected */
			switch (info->vendor) {
			case CFI_CMDSET_INTEL_STANDARD:
			case CFI_CMDSET_INTEL_EXTENDED:
				flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
				flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
				flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
				break;
			case CFI_CMDSET_AMD_STANDARD:
			case CFI_CMDSET_AMD_EXTENDED:
				flash_unlock_seq (info, sect);
				flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
							AMD_CMD_ERASE_START);
				flash_unlock_seq (info, sect);
				flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
				break;
			default:
				debug ("Unkown flash vendor %d\n",
				       info->vendor);
				break;
			}

			if (flash_full_status_check
			    (info, sect, info->erase_blk_tout, "erase")) {
				rcode = 1;
			} else
				putc ('.');
		}
	}
	puts (" done\n");
	return rcode;
}

/*-----------------------------------------------------------------------
 */
void flash_print_info (flash_info_t * info)
{
	int i;

	if (info->flash_id != FLASH_MAN_CFI) {
		puts ("missing or unknown FLASH type\n");
		return;
	}

	printf ("CFI conformant FLASH (%d x %d)",
		(info->portwidth << 3), (info->chipwidth << 3));
	printf ("  Size: %ld MB in %d Sectors\n",
		info->size >> 20, info->sector_count);
	printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
		info->erase_blk_tout,
		info->write_tout,
		info->buffer_write_tout,
		info->buffer_size);

	puts ("  Sector Start Addresses:");
	for (i = 0; i < info->sector_count; ++i) {
#ifdef CFG_FLASH_EMPTY_INFO
		int k;
		int size;
		int erased;
		volatile unsigned long *flash;

		/*
		 * Check if whole sector is erased
		 */
		if (i != (info->sector_count - 1))
			size = info->start[i + 1] - info->start[i];
		else
			size = info->start[0] + info->size - info->start[i];
		erased = 1;
		flash = (volatile unsigned long *) info->start[i];
		size = size >> 2;	/* divide by 4 for longword access */
		for (k = 0; k < size; k++) {
			if (*flash++ != 0xffffffff) {
				erased = 0;
				break;
			}
		}

		if ((i % 5) == 0)
			printf ("\n");
		/* print empty and read-only info */
		printf (" %08lX%s%s",
			info->start[i],
			erased ? " E" : "  ",
			info->protect[i] ? "RO " : "   ");
#else	/* ! CFG_FLASH_EMPTY_INFO */
		if ((i % 5) == 0)
			printf ("\n   ");
		printf (" %08lX%s",
			info->start[i], info->protect[i] ? " (RO)" : "     ");
#endif
	}
	putc ('\n');
	return;
}

/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
	ulong wp;
	ulong cp;
	int aln;
	cfiword_t cword;
	int i, rc;

#ifdef CFG_FLASH_USE_BUFFER_WRITE
	int buffered_size;
#endif
	/* get lower aligned address */
	/* get lower aligned address */
	wp = (addr & ~(info->portwidth - 1));

	/* handle unaligned start */
	if ((aln = addr - wp) != 0) {
		cword.l = 0;
		cp = wp;
		for (i = 0; i < aln; ++i, ++cp)
			flash_add_byte (info, &cword, (*(uchar *) cp));

		for (; (i < info->portwidth) && (cnt > 0); i++) {
			flash_add_byte (info, &cword, *src++);
			cnt--;
			cp++;
		}
		for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
			flash_add_byte (info, &cword, (*(uchar *) cp));
		if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
			return rc;
		wp = cp;
	}

	/* handle the aligned part */
#ifdef CFG_FLASH_USE_BUFFER_WRITE
	buffered_size = (info->portwidth / info->chipwidth);
	buffered_size *= info->buffer_size;
	while (cnt >= info->portwidth) {
		/* prohibit buffer write when buffer_size is 1 */
		if (info->buffer_size == 1) {
			cword.l = 0;
			for (i = 0; i < info->portwidth; i++)
				flash_add_byte (info, &cword, *src++);
			if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
				return rc;
			wp += info->portwidth;
			cnt -= info->portwidth;
			continue;
		}

		/* write buffer until next buffered_size aligned boundary */
		i = buffered_size - (wp % buffered_size);
		if (i > cnt)
			i = cnt;
		if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
			return rc;
		i -= i & (info->portwidth - 1);
		wp += i;
		src += i;
		cnt -= i;
	}
#else
	while (cnt >= info->portwidth) {
		cword.l = 0;
		for (i = 0; i < info->portwidth; i++) {
			flash_add_byte (info, &cword, *src++);
		}
		if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
			return rc;
		wp += info->portwidth;
		cnt -= info->portwidth;
	}
#endif /* CFG_FLASH_USE_BUFFER_WRITE */
	if (cnt == 0) {
		return (0);
	}

	/*
	 * handle unaligned tail bytes
	 */
	cword.l = 0;
	for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
		flash_add_byte (info, &cword, *src++);
		--cnt;
	}
	for (; i < info->portwidth; ++i, ++cp) {
		flash_add_byte (info, &cword, (*(uchar *) cp));
	}

	return flash_write_cfiword (info, wp, cword);
}

/*-----------------------------------------------------------------------
 */
#ifdef CFG_FLASH_PROTECTION

int flash_real_protect (flash_info_t * info, long sector, int prot)
{
	int retcode = 0;

	flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
	flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
	if (prot)
		flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
	else
		flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);

	if ((retcode =
	     flash_full_status_check (info, sector, info->erase_blk_tout,
				      prot ? "protect" : "unprotect")) == 0) {

		info->protect[sector] = prot;

		/*
		 * On some of Intel's flash chips (marked via legacy_unlock)
		 * unprotect unprotects all locking.
		 */
		if ((prot == 0) && (info->legacy_unlock)) {
			flash_sect_t i;

			for (i = 0; i < info->sector_count; i++) {
				if (info->protect[i])
					flash_real_protect (info, i, 1);
			}
		}
	}
	return retcode;
}

/*-----------------------------------------------------------------------
 * flash_read_user_serial - read the OneTimeProgramming cells
 */
void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
			     int len)
{
	uchar *src;
	uchar *dst;

	dst = buffer;
	src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
	flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
	memcpy (dst, src + offset, len);
	flash_write_cmd (info, 0, 0, info->cmd_reset);
}

/*
 * flash_read_factory_serial - read the device Id from the protection area
 */
void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
				int len)
{
	uchar *src;

	src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
	flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
	memcpy (buffer, src + offset, len);
	flash_write_cmd (info, 0, 0, info->cmd_reset);
}

#endif /* CFG_FLASH_PROTECTION */

/*
 * flash_is_busy - check to see if the flash is busy
 * This routine checks the status of the chip and returns true if the chip is busy
 */
static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
{
	int retval;

	switch (info->vendor) {
	case CFI_CMDSET_INTEL_STANDARD:
	case CFI_CMDSET_INTEL_EXTENDED:
		retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
		break;
	case CFI_CMDSET_AMD_STANDARD:
	case CFI_CMDSET_AMD_EXTENDED:
		retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
		break;
	default:
		retval = 0;
	}
	debug ("flash_is_busy: %d\n", retval);
	return retval;
}

/*-----------------------------------------------------------------------
 *  wait for XSR.7 to be set. Time out with an error if it does not.
 *  This routine does not set the flash to read-array mode.
 */
static int flash_status_check (flash_info_t * info, flash_sect_t sector,
			       ulong tout, char *prompt)
{
	ulong start;

#if CFG_HZ != 1000
	tout *= CFG_HZ/1000;
#endif

	/* Wait for command completion */
	start = get_timer (0);
	while (flash_is_busy (info, sector)) {
		if (get_timer (start) > tout) {
			printf ("Flash %s timeout at address %lx data %lx\n",
				prompt, info->start[sector],
				flash_read_long (info, sector, 0));
			flash_write_cmd (info, sector, 0, info->cmd_reset);
			return ERR_TIMOUT;
		}
		udelay (1);		/* also triggers watchdog */
	}
	return ERR_OK;
}

/*-----------------------------------------------------------------------
 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 * This routine sets the flash to read-array mode.
 */
static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
				    ulong tout, char *prompt)
{
	int retcode;

	retcode = flash_status_check (info, sector, tout, prompt);
	switch (info->vendor) {
	case CFI_CMDSET_INTEL_EXTENDED:
	case CFI_CMDSET_INTEL_STANDARD:
		if ((retcode == ERR_OK)
		    && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
			retcode = ERR_INVAL;
			printf ("Flash %s error at address %lx\n", prompt,
				info->start[sector]);
			if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
				puts ("Command Sequence Error.\n");
			} else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
				puts ("Block Erase Error.\n");
				retcode = ERR_NOT_ERASED;
			} else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
				puts ("Locking Error\n");
			}
			if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
				puts ("Block locked.\n");
				retcode = ERR_PROTECTED;
			}
			if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
				puts ("Vpp Low Error.\n");
		}
		flash_write_cmd (info, sector, 0, info->cmd_reset);
		break;
	default:
		break;
	}
	return retcode;
}

/*-----------------------------------------------------------------------
 */
static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
{
#if defined(__LITTLE_ENDIAN)
	unsigned short	w;
	unsigned int	l;
	unsigned long long ll;
#endif

	switch (info->portwidth) {
	case FLASH_CFI_8BIT:
		cword->c = c;
		break;
	case FLASH_CFI_16BIT:
#if defined(__LITTLE_ENDIAN)
		w = c;
		w <<= 8;
		cword->w = (cword->w >> 8) | w;
#else
		cword->w = (cword->w << 8) | c;
#endif
		break;
	case FLASH_CFI_32BIT:
#if defined(__LITTLE_ENDIAN)
		l = c;
		l <<= 24;
		cword->l = (cword->l >> 8) | l;
#else
		cword->l = (cword->l << 8) | c;
#endif
		break;
	case FLASH_CFI_64BIT:
#if defined(__LITTLE_ENDIAN)
		ll = c;
		ll <<= 56;
		cword->ll = (cword->ll >> 8) | ll;
#else
		cword->ll = (cword->ll << 8) | c;
#endif
		break;
	}
}


/*-----------------------------------------------------------------------
 * make a proper sized command based on the port and chip widths
 */
static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
{
	int i;
	uchar *cp = (uchar *) cmdbuf;

#if defined(CFG_FLASH_CFI_SWAP)
	for (i = info->portwidth; i > 0; i--)
#else
	for (i = 1; i <= info->portwidth; i++)
#endif
		*cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
#ifdef CFG_FLASH_CFI_2x16
	if ((info->portwidth == FLASH_CFI_32BIT) && (info->chipwidth == FLASH_CFI_BY16))
	{
	   uchar tmp;
	   cp = (uchar *) cmdbuf;
	   tmp = cp[1];
	   cp[1] = cp[2];
	   cp[2] = tmp;
	}
#endif /* CFG_FLASH_CFI_2x16 */
}

/*
 * Write a proper sized command to the correct address
 */
static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
{

	volatile cfiptr_t addr;
	cfiword_t cword;

	addr.cp = flash_make_addr (info, sect, offset);
	flash_make_cmd (info, cmd, &cword);
	switch (info->portwidth) {
	case FLASH_CFI_8BIT:
		debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
		       cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
		*addr.cp = cword.c;
#ifdef CONFIG_BLACKFIN
		asm("ssync;");
#endif
		break;
	case FLASH_CFI_16BIT:
		debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
		       cmd, cword.w,
		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
		*addr.wp = cword.w;
#ifdef CONFIG_BLACKFIN
		asm("ssync;");
#endif
		break;
	case FLASH_CFI_32BIT:
		debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
		       cmd, cword.l,
		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
		*addr.lp = cword.l;
#ifdef CONFIG_BLACKFIN
		asm("ssync;");
#endif
		break;
	case FLASH_CFI_64BIT:
#ifdef DEBUG
		{
			char str[20];

			print_longlong (str, cword.ll);

			debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
			       addr.llp, cmd, str,
			       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
		}
#endif
		*addr.llp = cword.ll;
#ifdef CONFIG_BLACKFIN
		asm("ssync;");
#endif
		break;
	}
}

static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
{
	flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
	flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
}

/*-----------------------------------------------------------------------
 */
static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
{
	cfiptr_t cptr;
	cfiword_t cword;
	int retval;

	cptr.cp = flash_make_addr (info, sect, offset);
	flash_make_cmd (info, cmd, &cword);

	debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
	switch (info->portwidth) {
	case FLASH_CFI_8BIT:
		debug ("is= %x %x\n", cptr.cp[0], cword.c);
		retval = (cptr.cp[0] == cword.c);
		break;
	case FLASH_CFI_16BIT:
		debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
		retval = (cptr.wp[0] == cword.w);
		break;
	case FLASH_CFI_32BIT:
		debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
		retval = (cptr.lp[0] == cword.l);
		break;
	case FLASH_CFI_64BIT:
#ifdef DEBUG
		{
			char str1[20];
			char str2[20];

			print_longlong (str1, cptr.llp[0]);
			print_longlong (str2, cword.ll);
			debug ("is= %s %s\n", str1, str2);
		}
#endif
		retval = (cptr.llp[0] == cword.ll);
		break;
	default:
		retval = 0;
		break;
	}
	return retval;
}

/*-----------------------------------------------------------------------
 */
static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
{
	cfiptr_t cptr;
	cfiword_t cword;
	int retval;

	cptr.cp = flash_make_addr (info, sect, offset);
	flash_make_cmd (info, cmd, &cword);
	switch (info->portwidth) {
	case FLASH_CFI_8BIT:
		retval = ((cptr.cp[0] & cword.c) == cword.c);
		break;
	case FLASH_CFI_16BIT:
		retval = ((cptr.wp[0] & cword.w) == cword.w);
		break;
	case FLASH_CFI_32BIT:
		retval = ((cptr.lp[0] & cword.l) == cword.l);
		break;
	case FLASH_CFI_64BIT:
		retval = ((cptr.llp[0] & cword.ll) == cword.ll);
		break;
	default:
		retval = 0;
		break;
	}
	return retval;
}

/*-----------------------------------------------------------------------
 */
static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
{
	cfiptr_t cptr;
	cfiword_t cword;
	int retval;

	cptr.cp = flash_make_addr (info, sect, offset);
	flash_make_cmd (info, cmd, &cword);
	switch (info->portwidth) {
	case FLASH_CFI_8BIT:
		retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
		break;
	case FLASH_CFI_16BIT:
		retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
		break;
	case FLASH_CFI_32BIT:
		retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
		break;
	case FLASH_CFI_64BIT:
		retval = ((cptr.llp[0] & cword.ll) !=
			  (cptr.llp[0] & cword.ll));
		break;
	default:
		retval = 0;
		break;
	}
	return retval;
}

/*-----------------------------------------------------------------------
 * detect if flash is compatible with the Common Flash Interface (CFI)
 * http://www.jedec.org/download/search/jesd68.pdf
 *
*/
static int flash_detect_cfi (flash_info_t * info)
{
	debug ("flash detect cfi\n");

	for (info->portwidth = CFG_FLASH_CFI_WIDTH;
	     info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
		for (info->chipwidth = FLASH_CFI_BY8;
		     info->chipwidth <= info->portwidth;
		     info->chipwidth <<= 1) {
			flash_write_cmd (info, 0, 0, info->cmd_reset);
			flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
			if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
			    && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
			    && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
				info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
				debug ("device interface is %d\n",
				       info->interface);
				debug ("found port %d chip %d ",
				       info->portwidth, info->chipwidth);
				debug ("port %d bits chip %d bits\n",
				       info->portwidth << CFI_FLASH_SHIFT_WIDTH,
				       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
				return 1;
			}
		}
	}
	debug ("not found\n");
	return 0;
}

/*
 * The following code cannot be run from FLASH!
 *
 */
ulong flash_get_size (ulong base, int banknum)
{
	flash_info_t *info = &flash_info[banknum];
	int i, j;
	flash_sect_t sect_cnt;
	unsigned long sector;
	unsigned long tmp;
	int size_ratio;
	uchar num_erase_regions;
	int erase_region_size;
	int erase_region_count;
#ifdef CFG_FLASH_PROTECTION
	int ext_addr;
	info->legacy_unlock = 0;
#endif

	info->start[0] = base;

	if (flash_detect_cfi (info)) {
		info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
#ifdef DEBUG
		flash_printqry (info, 0);
#endif
		switch (info->vendor) {
		case CFI_CMDSET_INTEL_STANDARD:
		case CFI_CMDSET_INTEL_EXTENDED:
		default:
			info->cmd_reset = FLASH_CMD_RESET;
#ifdef CFG_FLASH_PROTECTION
			/* read legacy lock/unlock bit from intel flash */
			ext_addr = flash_read_ushort (info, 0,
						      FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
			info->legacy_unlock =
				flash_read_uchar (info, ext_addr + 5) & 0x08;
#endif
			break;
		case CFI_CMDSET_AMD_STANDARD:
		case CFI_CMDSET_AMD_EXTENDED:
			info->cmd_reset = AMD_CMD_RESET;
			break;
		}

		debug ("manufacturer is %d\n", info->vendor);
		size_ratio = info->portwidth / info->chipwidth;
		/* if the chip is x8/x16 reduce the ratio by half */
		if ((info->interface == FLASH_CFI_X8X16)
		    && (info->chipwidth == FLASH_CFI_BY8)) {
			size_ratio >>= 1;
		}
		num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
		debug ("size_ratio %d port %d bits chip %d bits\n",
		       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
		       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
		debug ("found %d erase regions\n", num_erase_regions);
		sect_cnt = 0;
		sector = base;
		for (i = 0; i < num_erase_regions; i++) {
			if (i > NUM_ERASE_REGIONS) {
				printf ("%d erase regions found, only %d used\n",
					num_erase_regions, NUM_ERASE_REGIONS);
				break;
			}
			tmp = flash_read_long (info, 0,
					       FLASH_OFFSET_ERASE_REGIONS +
					       i * 4);
			erase_region_size =
				(tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
			tmp >>= 16;
			erase_region_count = (tmp & 0xffff) + 1;
			debug ("erase_region_count = %d erase_region_size = %d\n",
				erase_region_count, erase_region_size);
			for (j = 0; j < erase_region_count; j++) {
				info->start[sect_cnt] = sector;
				sector += (erase_region_size * size_ratio);

				/*
				 * Only read protection status from supported devices (intel...)
				 */
				switch (info->vendor) {
				case CFI_CMDSET_INTEL_EXTENDED:
				case CFI_CMDSET_INTEL_STANDARD:
					info->protect[sect_cnt] =
						flash_isset (info, sect_cnt,
							     FLASH_OFFSET_PROTECT,
							     FLASH_STATUS_PROTECT);
					break;
				default:
					info->protect[sect_cnt] = 0; /* default: not protected */
				}

				sect_cnt++;
			}
		}

		info->sector_count = sect_cnt;
		/* multiply the size by the number of chips */
		info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
		info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
		tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
		info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
		tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
			(1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
		info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
		tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
		      (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
		info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
		info->flash_id = FLASH_MAN_CFI;
		if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
			info->portwidth >>= 1;	/* XXX - Need to test on x8/x16 in parallel. */
		}
	}

	flash_write_cmd (info, 0, 0, info->cmd_reset);
	return (info->size);
}

/* loop through the sectors from the highest address
 * when the passed address is greater or equal to the sector address
 * we have a match
 */
static flash_sect_t find_sector (flash_info_t * info, ulong addr)
{
	flash_sect_t sector;

	for (sector = info->sector_count - 1; sector >= 0; sector--) {
		if (addr >= info->start[sector])
			break;
	}
	return sector;
}

/*-----------------------------------------------------------------------
 */
static int flash_write_cfiword (flash_info_t * info, ulong dest,
				cfiword_t cword)
{
	cfiptr_t ctladdr;
	cfiptr_t cptr;
	int flag;

	ctladdr.cp = flash_make_addr (info, 0, 0);
	cptr.cp = (uchar *) dest;


	/* Check if Flash is (sufficiently) erased */
	switch (info->portwidth) {
	case FLASH_CFI_8BIT:
		flag = ((cptr.cp[0] & cword.c) == cword.c);
		break;
	case FLASH_CFI_16BIT:
		flag = ((cptr.wp[0] & cword.w) == cword.w);
		break;
	case FLASH_CFI_32BIT:
		flag = ((cptr.lp[0] & cword.l) == cword.l);
		break;
	case FLASH_CFI_64BIT:
		flag = ((cptr.llp[0] & cword.ll) == cword.ll);
		break;
	default:
		return 2;
	}
	if (!flag)
		return 2;

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts ();

	switch (info->vendor) {
	case CFI_CMDSET_INTEL_EXTENDED:
	case CFI_CMDSET_INTEL_STANDARD:
		flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
		flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
		break;
	case CFI_CMDSET_AMD_EXTENDED:
	case CFI_CMDSET_AMD_STANDARD:
		flash_unlock_seq (info, 0);
		flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
		break;
	}

	switch (info->portwidth) {
	case FLASH_CFI_8BIT:
		cptr.cp[0] = cword.c;
		break;
	case FLASH_CFI_16BIT:
		cptr.wp[0] = cword.w;
		break;
	case FLASH_CFI_32BIT:
		cptr.lp[0] = cword.l;
		break;
	case FLASH_CFI_64BIT:
		cptr.llp[0] = cword.ll;
		break;
	}

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts ();

	return flash_full_status_check (info, find_sector (info, dest),
					info->write_tout, "write");
}

#ifdef CFG_FLASH_USE_BUFFER_WRITE

static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
				  int len)
{
	flash_sect_t sector;
	int cnt;
	int retcode;
	volatile cfiptr_t src;
	volatile cfiptr_t dst;

	switch (info->vendor) {
	case CFI_CMDSET_INTEL_STANDARD:
	case CFI_CMDSET_INTEL_EXTENDED:
		src.cp = cp;
		dst.cp = (uchar *) dest;
		sector = find_sector (info, dest);
		flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
		flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
		if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
						   "write to buffer")) == ERR_OK) {
			/* reduce the number of loops by the width of the port	*/
			switch (info->portwidth) {
			case FLASH_CFI_8BIT:
				cnt = len;
				break;
			case FLASH_CFI_16BIT:
				cnt = len >> 1;
				break;
			case FLASH_CFI_32BIT:
				cnt = len >> 2;
				break;
			case FLASH_CFI_64BIT:
				cnt = len >> 3;
				break;
			default:
				return ERR_INVAL;
				break;
			}
			flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
			while (cnt-- > 0) {
				switch (info->portwidth) {
				case FLASH_CFI_8BIT:
					*dst.cp++ = *src.cp++;
					break;
				case FLASH_CFI_16BIT:
					*dst.wp++ = *src.wp++;
					break;
				case FLASH_CFI_32BIT:
					*dst.lp++ = *src.lp++;
					break;
				case FLASH_CFI_64BIT:
					*dst.llp++ = *src.llp++;
					break;
				default:
					return ERR_INVAL;
					break;
				}
			}
			flash_write_cmd (info, sector, 0,
					 FLASH_CMD_WRITE_BUFFER_CONFIRM);
			retcode = flash_full_status_check (info, sector,
							   info->buffer_write_tout,
							   "buffer write");
		}
		return retcode;

	case CFI_CMDSET_AMD_STANDARD:
	case CFI_CMDSET_AMD_EXTENDED:
		src.cp = cp;
		dst.cp = (uchar *) dest;
		sector = find_sector (info, dest);

		flash_unlock_seq(info,0);
		flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);

		switch (info->portwidth) {
		case FLASH_CFI_8BIT:
			cnt = len;
			flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
			while (cnt-- > 0) *dst.cp++ = *src.cp++;
			break;
		case FLASH_CFI_16BIT:
			cnt = len >> 1;
			flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
			while (cnt-- > 0) *dst.wp++ = *src.wp++;
			break;
		case FLASH_CFI_32BIT:
			cnt = len >> 2;
			flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
			while (cnt-- > 0) *dst.lp++ = *src.lp++;
			break;
		case FLASH_CFI_64BIT:
			cnt = len >> 3;
			flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
			while (cnt-- > 0) *dst.llp++ = *src.llp++;
			break;
		default:
			return ERR_INVAL;
		}

		flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
		retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
						   "buffer write");
		return retcode;

	default:
		debug ("Unknown Command Set\n");
		return ERR_INVAL;
	}
}
#endif /* CFG_FLASH_USE_BUFFER_WRITE */
#endif /* CFG_FLASH_CFI */

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Stefan Roese]

Hi Yuli,

On Monday 07 August 2006 13:04, Yuli Barcohen wrote:
> Sounds like it's the (in)famous byte lanes swapping issue. It's so
> common that Linux MTD code even includes support for this. There are
> even more problematic flashes like Spansion S70GL256M which consists of
> two parts, one big-endian and another little-endian. I had to support
> the lanes swapping (and even the "mixed-endian") on many customers'
> boards. I've attached to this mail the CFI driver version which I
> use. It works well on many PowerPC boards but I've got no little-endian
> system to test it (my tree is not fully merged with official GIT right
> now so I'm not sending a patch, I can prepare one if you think the
> approach is OK).

Yes, please send a patch, so we can better see the changes to the official 
version. Thanks.

Best regards,
Stefan

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Yuli Barcohen <yuli@arabellasw.com> wrote:
> Sounds like it's the (in)famous byte lanes 
> swapping issue. It's so
[snip]
> system to test it (my tree is not fully merged with
> official GIT right
> now so I'm not sending a patch, I can prepare one if
> you think the
> approach is OK).

Indeed, I applied this CFI Driver on MPC7448HPC2
and it did work. But a small puzzle is that 
CFG_FLASH_CFI_SWAP shouldn't be tied to
__LITTLE_ENDIAN. According to my test, they
two can be set separetely.

diff --git a/include/configs/taiga.h
b/include/configs/taiga.h
index 8d4e9ad..878f268 100644
--- a/include/configs/taiga.h
+++ b/include/configs/taiga.h
@@ -500,6 +500,7 @@ #define CFG_BOOTMAPSZ    (8<<20)
/* Init
  */
 #define CFG_FLASH_CFI           1       
 #define CFG_FLASH_CFI_DRIVER    1       
+#define CFG_FLASH_CFI_SWAP
 #define CFG_FLASH_USE_BUFFER_WRITE 1 
/* Disable CFG_FLASH_USE_BUFFER_WRITE is OK */
#define CFG_MAX_FLASH_BANKS     1

Thanks a lot,

Sam

__________________________________________________
???????????????
http://cn.mail.yahoo.com
-------------- next part --------------
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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

> Indeed, I applied this CFI Driver on MPC7448HPC2 and it did 
> work. But a small puzzle is that CFG_FLASH_CFI_SWAP shouldn't 
> be tied to __LITTLE_ENDIAN. According to my test, they two 
> can be set separetely.

Please try the patch I posted yesterday.
define CFG_FLASH_TSI_SWAP_BYTE in your board config file.

> 
> diff --git a/include/configs/taiga.h
> b/include/configs/taiga.h
Where do you get this file? It should be mpc7448hpc2.h. 
taiga.h is our previous header file.

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Zang Roy-r61911 <tie-fei.zang@freescale.com> wrote:
> Please try the patch I posted yesterday.
> define CFG_FLASH_TSI_SWAP_BYTE in your board config
> file.

It should work as expected. But I think we could
work out a more general CFI driver. So Yuli's
patch is still acceptable. What do you think?

> > diff --git a/include/configs/taiga.h
> > b/include/configs/taiga.h
> Where do you get this file? It should be
> mpc7448hpc2.h. 
> taiga.h is our previous header file.

I shorten mpc7448hpc2 as taiga for few typing
in my git tree. It's content could be the same
as yours.

Thanks,

Sam


		
___________________________________________________________ 
????????-3.5G???20M??? 
http://cn.mail.yahoo.com

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

> > Please try the patch I posted yesterday.
> > define CFG_FLASH_TSI_SWAP_BYTE in your board config file.
> 
> It should work as expected. But I think we could work out a 
> more general CFI driver. So Yuli's patch is still acceptable. 
> What do you think?
Where is the patch?  I do not object.  
Our final goal is to enable the general flash driver work on
the  board.
Roy
 

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Zang Roy-r61911 <tie-fei.zang@freescale.com> wrote:
> Where is the patch?  I do not object.  
> Our final goal is to enable the general flash driver
> work on the  board.

Sorry, I misused the word patch:-). The "patch" is 
Yuli's cfi_flash.c in his attached file. See your
mail archive. It would be there. I tested that it 
was OK but still need your confirmation, I am afraid.

Thanks,

Sam


	

	
		
___________________________________________________________ 
Mp3???-???????
http://music.yahoo.com.cn/?source=mail_mailbox_footer

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Yuli Barcohen]

>>>>> Sam Song writes:

    Zang> Where is the patch?  I do not object.  Our final goal is to
    Zang> enable the general flash driver work on the board.

    Sam> Sorry, I misused the word patch:-). The "patch" is Yuli's
    Sam> cfi_flash.c in his attached file. See your mail archive. It
    Sam> would be there. I tested that it was OK but still need your
    Sam> confirmation, I am afraid.

OK, the patch is attached. As we know, it works on big-endian systems.
On little-endian ones, it should change nothing.

-- 
========================================================================
 Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project Leader
 yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software, Israel
========================================================================
-------------- next part --------------
--- ../GIT/drivers/cfi_flash.c	2006-06-06 09:48:51.000000000 +0300
+++ drivers/cfi_flash.c	2006-07-26 17:16:37.000000000 +0300
@@ -2,9 +2,12 @@
  * (C) Copyright 2002-2004
  * Brad Kemp, Seranoa Networks, Brad.Kemp at seranoa.com
  *
- * Copyright (C) 2003 Arabella Software Ltd.
+ * Copyright (C) 2003, 2006 Arabella Software Ltd.
  * Yuli Barcohen <yuli@arabellasw.com>
  * Modified to work with AMD flashes
+ * Added support for byte lanes swap
+ * Added support for 32-bit chips consisting of two 16-bit devices
+ * (for example, S70GL256M00)
  *
  * Copyright (C) 2004
  * Ed Okerson
@@ -45,10 +48,13 @@
 /* #define DEBUG	*/
 
 #include <common.h>
+
+#ifdef	CFG_FLASH_CFI_DRIVER
+
+#include <watchdog.h>
 #include <asm/processor.h>
 #include <asm/byteorder.h>
 #include <environment.h>
-#ifdef	CFG_FLASH_CFI_DRIVER
 
 /*
  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
@@ -71,6 +77,10 @@
  * Verify erase and program timeouts.
  */
 
+#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
+#define CFG_FLASH_CFI_SWAP
+#endif
+
 #ifndef CFG_FLASH_BANKS_LIST
 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
 #endif
@@ -268,7 +278,7 @@ inline uchar flash_read_uchar (flash_inf
 	uchar *cp;
 
 	cp = flash_make_addr (info, 0, offset);
-#if defined(__LITTLE_ENDIAN)
+#if defined(CFG_FLASH_CFI_SWAP)
 	return (cp[0]);
 #else
 	return (cp[info->portwidth - 1]);
@@ -295,7 +305,7 @@ ushort flash_read_ushort (flash_info_t *
 		debug ("addr[%x] = 0x%x\n", x, addr[x]);
 	}
 #endif
-#if defined(__LITTLE_ENDIAN)
+#if defined(CFG_FLASH_CFI_SWAP)
 	retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 #else
 	retval = ((addr[(2 * info->portwidth) - 1] << 8) |
@@ -327,7 +337,7 @@ ulong flash_read_long (flash_info_t * in
 		debug ("addr[%x] = 0x%x\n", x, addr[x]);
 	}
 #endif
-#if defined(__LITTLE_ENDIAN)
+#if defined(CFG_FLASH_CFI_SWAP)
 	retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 		(addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 #else
@@ -892,12 +902,22 @@ static void flash_make_cmd (flash_info_t
 	int i;
 	uchar *cp = (uchar *) cmdbuf;
 
-#if defined(__LITTLE_ENDIAN)
+#if defined(CFG_FLASH_CFI_SWAP)
 	for (i = info->portwidth; i > 0; i--)
 #else
 	for (i = 1; i <= info->portwidth; i++)
 #endif
 		*cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
+#ifdef CFG_FLASH_CFI_2x16
+	if ((info->portwidth == FLASH_CFI_32BIT) && (info->chipwidth == FLASH_CFI_BY16))
+	{
+	   uchar tmp;
+	   cp = (uchar *) cmdbuf;
+	   tmp = cp[1];
+	   cp[1] = cp[2];
+	   cp[2] = tmp;
+	}
+#endif /* CFG_FLASH_CFI_2x16 */
 }
 
 /*

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Li Yang-r58472]

+#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
+#define CFG_FLASH_CFI_SWAP
+#endif
+
[snip]
-#if defined(__LITTLE_ENDIAN)
+#if defined(CFG_FLASH_CFI_SWAP)

Why use CFG_FLASH_CFI_SWAP instead of __LITTLE_ENDIAN.  It seems that
they are equivalent.

Best Regards,
Leo
> -----Original Message-----
> From: u-boot-users-bounces at lists.sourceforge.net
> [mailto:u-boot-users-bounces at lists.sourceforge.net] On Behalf Of Yuli
Barcohen
> Sent: Tuesday, August 08, 2006 7:00 PM
> To: u-boot-users at lists.sourceforge.net
> Cc: Sam Song; Wolfgang Denk
> Subject: Re: [U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue
> 
> >>>>> Sam Song writes:
> 
>     Zang> Where is the patch?  I do not object.  Our final goal is to
>     Zang> enable the general flash driver work on the board.
> 
>     Sam> Sorry, I misused the word patch:-). The "patch" is Yuli's
>     Sam> cfi_flash.c in his attached file. See your mail archive. It
>     Sam> would be there. I tested that it was OK but still need your
>     Sam> confirmation, I am afraid.
> 
> OK, the patch is attached. As we know, it works on big-endian systems.
> On little-endian ones, it should change nothing.
> 
> --
>
========================================================================
>  Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project
Leader
>  yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software,
Israel
>
========================================================================

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Yuli Barcohen]

>>>>> Li Yang writes:

    Li> +#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
    Li> +#define CFG_FLASH_CFI_SWAP
    Li> +#endif
    Li> + [snip]
    Li> -#if defined(__LITTLE_ENDIAN)
    Li> +#if defined(CFG_FLASH_CFI_SWAP)

    Li> Why use CFG_FLASH_CFI_SWAP instead of __LITTLE_ENDIAN.  It seems
    Li> that they are equivalent.

No, they aren't. First of all, on big-endian systems __LITTLE_ENDIAN is
never defined and on little-endian systems it's always defined
automatically while CFG_FLASH_CFI_SWAP must be defined manually if your
board has such a flash. On little-endian systems, the driver should work
without the need to define CFG_FLASH_CFI_SWAP. Also, there are places in
the code for __LITTLE_ENDIAN only, not for CFG_FLASH_CFI_SWAP.

-- 
========================================================================
 Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project Leader
 yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software, Israel
========================================================================

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Li Yang-r58472]

Got it.  It's a little bit misleading to read your patch alone.

Your patch is mostly the same with Roy's latest patch, but with a more
generic name.  So, I prefer your version.  :)

Best Regards,
Leo
> -----Original Message-----
> From: Yuli Barcohen [mailto:yuli at arabellasw.com]
> Sent: Tuesday, August 08, 2006 7:26 PM
> To: Li Yang-r58472
> Cc: u-boot-users at lists.sourceforge.net; Sam Song; Wolfgang Denk
> Subject: RE: [U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue
> 
> >>>>> Li Yang writes:
> 
>     Li> +#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
>     Li> +#define CFG_FLASH_CFI_SWAP
>     Li> +#endif
>     Li> + [snip]
>     Li> -#if defined(__LITTLE_ENDIAN)
>     Li> +#if defined(CFG_FLASH_CFI_SWAP)
> 
>     Li> Why use CFG_FLASH_CFI_SWAP instead of __LITTLE_ENDIAN.  It
seems
>     Li> that they are equivalent.
> 
> No, they aren't. First of all, on big-endian systems __LITTLE_ENDIAN
is
> never defined and on little-endian systems it's always defined
> automatically while CFG_FLASH_CFI_SWAP must be defined manually if
your
> board has such a flash. On little-endian systems, the driver should
work
> without the need to define CFG_FLASH_CFI_SWAP. Also, there are places
in
> the code for __LITTLE_ENDIAN only, not for CFG_FLASH_CFI_SWAP.
> 
> --
>
========================================================================
>  Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project
Leader
>  yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software,
Israel
>
========================================================================

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

> Got it.  It's a little bit misleading to read your patch alone.
> 
> Your patch is mostly the same with Roy's latest patch, but 
> with a more generic name.  So, I prefer your version.  :)

Ummm...  the name is better for other board.
I had thought there were few boards to get into this issue except
mpc7448hpc2.
Roy

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Yuli Barcohen <yuli@arabellasw.com> wrote:
> No, they aren't. First of all, on big-endian systems
> __LITTLE_ENDIAN is
> never defined and on little-endian systems it's
> always defined
> automatically while CFG_FLASH_CFI_SWAP must be
> defined manually if your
> board has such a flash. On little-endian systems,
> the driver should work
> without the need to define CFG_FLASH_CFI_SWAP. Also,
> there are places in
> the code for __LITTLE_ENDIAN only, not for
> CFG_FLASH_CFI_SWAP.

Seems your explaination is not the same as your
patch:-). I hope I weren't clear this time.

In your patch, CFG_FLASH_CFI_SWAP is automatically
defined in __LITTLE_ENDIAN case. So on
__LITTLE_ENDIAN system, CFG_FLASH_CFI_SWAP MUST
BE ENABLED by default.

+#if defined(__LITTLE_ENDIAN) &&
!defined(CFG_FLASH_CFI_SWAP)
+#define CFG_FLASH_CFI_SWAP
+#endif

Regards,

Sam


	

	
		
___________________________________________________________ 
Mp3???-???????
http://music.yahoo.com.cn/?source=mail_mailbox_footer

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Yuli Barcohen]

>>>>> Sam Song writes:

    Yuli> No, they aren't. First of all, on big-endian systems
    Yuli> __LITTLE_ENDIAN is never defined and on little-endian systems
    Yuli> it's always defined automatically while CFG_FLASH_CFI_SWAP
    Yuli> must be defined manually if your board has such a flash. On
    Yuli> little-endian systems, the driver should work without the need
    Yuli> to define CFG_FLASH_CFI_SWAP. Also, there are places in the
    Yuli> code for __LITTLE_ENDIAN only, not for CFG_FLASH_CFI_SWAP.

    Sam> Seems your explaination is not the same as your patch:-).

Yes, the explanation is in English and the patch is in C:) The meaning
is the same though.

    Sam> I hope I weren't clear this time.

    Sam> In your patch, CFG_FLASH_CFI_SWAP is automatically defined in
    Sam> __LITTLE_ENDIAN case. So on __LITTLE_ENDIAN system,
    Sam> CFG_FLASH_CFI_SWAP MUST BE ENABLED by default.

So it's exactly what I explained: little-endian systems work
automatically without the need to define CFG_FLASH_CFI_SWAP. I meant,
you don't have to #define CFG_FLASH_CFI_SWAP in the board configuration
file to have working little-endian system. It's defined automatically
when needed. Sorry if it wasn't clear enough.

    Sam> +#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
    Sam> +#define CFG_FLASH_CFI_SWAP
    Sam> +#endif

If it makes things simpler, it's possible to replace

   #ifdef CFG_FLASH_CFI_SWAP

by

   #if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_CFI_SWAP)

and remove the above mentioned definition of CFG_FLASH_CFI_SWAP.

-- 
========================================================================
 Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project Leader
 yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software, Israel
========================================================================

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Yuli Barcohen <yuli@arabellasw.com> wrote:

> Yes, the explanation is in English and the patch is
> in C:) The meaning is the same though.

Well said:-)

> So it's exactly what I explained: little-endian
> systems work

Oops, it is clear to me now. Keep all the code
like that.

Thanks,

Sam


		
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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

>     Zang> Where is the patch?  I do not object.  Our final goal is to
>     Zang> enable the general flash driver work on the board.
> 
>     Sam> Sorry, I misused the word patch:-). The "patch" is Yuli's
>     Sam> cfi_flash.c in his attached file. See your mail archive. It
>     Sam> would be there. I tested that it was OK but still need your
>     Sam> confirmation, I am afraid.
> 
> OK, the patch is attached. As we know, it works on big-endian systems.
> On little-endian ones, it should change nothing.
> 

This patch is similar to my previous one. it works on my mpc7448hpc2
(tagia) board.
I appreciate the method and the name you import CFG_FLASH_CFI_SWAP. I
hope it 
can deal with similar boards.

Wolfgang,
	Could you apply it in your public git tree?
Roy

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Zang Roy-r61911 <tie-fei.zang@freescale.com> wrote:
> This patch is similar to my previous one. it works
> on my mpc7448hpc2 (tagia) board.
> I appreciate the method and the name you import
> CFG_FLASH_CFI_SWAP.
[snip]
> Wolfgang,
> 	Could you apply it in your public git tree?
> Roy
> 

Seems it's better to create the patch in a new 
thread sending to the list. Besides, it is 
necessary to add an entry for CFG_FLASH_CFI_SWAP
in README. 

Thanks,

Sam

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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

> > Where is the patch?  I do not object.  
> > Our final goal is to enable the general flash driver work on the  
> > board.
> 
> Sorry, I misused the word patch:-). The "patch" is Yuli's 
> cfi_flash.c in his attached file. See your mail archive. It 
> would be there. I tested that it was OK but still need your 
> confirmation, I am afraid.
I will try it.
While it's better to provide patch. We can see the difference.
Roy

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

> 
> Hello Ed Okerson,
> 
> Recently, Roy Zang released MPC7448 HPC-II platform support 
> to this list and found a CFI Flash driver problem - 
> North-bridge chip TSI108 working as little-endian but write 
> to Flash is byte-swapped in a wrong way. 
> The workaround is to enable
> CFG_FLASH_USE_BUFFER_WRITE in little endian setting. However, 
> CFG_FLASH_USE_BUFFER_WRITE should have nothing to do with 
> little endian if I am right. So I suspect flash writing with 
> little endian could have some problems.

Flash writing on a pure little endian system should be right.
CFG_FLASH_USE_BUFFER_WRITE could not solve the issue on mpc7448hpc2
board.
Just as I mentioned before., 
"For handling unaligned head and tail bytes, the byte swap issue also
exists.
For example
=> cp.b 400002 fff80002 12 (from ram to flash)."
There will be some adjustment for my mpc7448hpc2 patch. 
Now I am struggled with the tsi108 config read exception.
I hope I can repost the whole  patch again in this week.
For cfi_flash.c driver, I add the following patch.

diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c
index fd0a186..f621bc1 100644
--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -268,7 +268,7 @@ inline uchar flash_read_uchar (flash_inf
 	uchar *cp;
 
 	cp = flash_make_addr (info, 0, offset);
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP_BYTE)
 	return (cp[0]);
 #else
 	return (cp[info->portwidth - 1]);
@@ -295,7 +295,7 @@ #ifdef DEBUG
 		debug ("addr[%x] = 0x%x\n", x, addr[x]);
 	}
 #endif
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP_BYTE)
 	retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 #else
 	retval = ((addr[(2 * info->portwidth) - 1] << 8) |
@@ -327,7 +327,7 @@ #ifdef DEBUG
 		debug ("addr[%x] = 0x%x\n", x, addr[x]);
 	}
 #endif
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP_BYTE)
 	retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 		(addr[(2 * info->portwidth)]) | (addr[(3 *
info->portwidth)] << 8);
 #else
@@ -596,7 +596,6 @@ #ifdef CFG_FLASH_USE_BUFFER_WRITE
 	int buffered_size;
 #endif
 	/* get lower aligned address */
-	/* get lower aligned address */
 	wp = (addr & ~(info->portwidth - 1));
 
 	/* handle unaligned start */
@@ -892,7 +891,7 @@ static void flash_make_cmd (flash_info_t
 	int i;
 	uchar *cp = (uchar *) cmdbuf;
 
-#if defined(__LITTLE_ENDIAN)
+#if defined(__LITTLE_ENDIAN) || defined(CFG_FLASH_TSI_SWAP_BYTE)
 	for (i = info->portwidth; i > 0; i--)
 #else
 	for (i = 1; i <= info->portwidth; i++)

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Zang Roy-r61911 <tie-fei.zang@freescale.com>wrote:
> Flash writing on a pure little endian system should
> be right.

Out of interest, what the difference between a pure
little endian system and TSI108 HLP working as LE
mode?

Could we set TSI108 HLP working as BE?

Thanks a lot,

Sam


	

	
		
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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

> > Flash writing on a pure little endian system should be right.
> 
> Out of interest,

Why?
It just begins. If everything is OK, what should we do?

 what the difference between a pure little 
> endian system and TSI108 HLP working as LE mode?
> 
A pure little endian system might be
X86 processor +  little endian connected flash.

> Could we set TSI108 HLP working as BE?
we can set register HLP_DATA_SWAP_CTRL for data swap for tsi108 HLP
port.
Please refer 7.6 Data Swapping chapter of the data sheet.

Roy

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Zang Roy-r61911 <tie-fei.zang@freescale.com> wrote:
> A pure little endian system might be
> X86 processor +  little endian connected flash.

It reminded me of the fact there is probably a LE
system in our LAB. I will play with it
when available.

> > Could we set TSI108 HLP working as BE?
> we can set register HLP_DATA_SWAP_CTRL for data swap
> for tsi108 HLP port. Please refer 7.6 Data Swapping
> chapter of the data sheet.

Thanks. I will check that. 

Sam


		
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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Zang Roy-r61911]

> > A pure little endian system might be
> > X86 processor +  little endian connected flash.
> 
> It reminded me of the fact there is probably a LE system in 
> our LAB. I will play with it when available.
That's good.
> 
> > > Could we set TSI108 HLP working as BE?
> > we can set register HLP_DATA_SWAP_CTRL for data swap for tsi108 HLP 
> > port. Please refer 7.6 Data Swapping chapter of the data sheet.
> 
> Thanks. I will check that. 
I have tried all the combinations, it does not seem workable for our
issue.
Roy

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Sam Song]

Zang Roy-r61911 <tie-fei.zang@freescale.com> wrote:
> I have tried all the combinations, it does not seem
> workable for our issue.

That's fine. I meant to make such a try. Well, 
you save me from that.

Thanks a lot,

Sam



	

	
		
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[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Li Yang-r58472]

Please ignore my last question.  Lately, I find out in your .c file that
there are still some places using __LITTLE_ENDIAN.

However, I still have a question that in which condition
CFG_FLASH_CFI_SWAP is required to set?

Best Regards,
Leo
> -----Original Message-----
> From: Li Yang-r58472
> Sent: Tuesday, August 08, 2006 7:11 PM
> To: 'Yuli Barcohen'; u-boot-users at lists.sourceforge.net
> Cc: Sam Song; Wolfgang Denk
> Subject: RE: [U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue
> 
> +#if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
> +#define CFG_FLASH_CFI_SWAP
> +#endif
> +
> [snip]
> -#if defined(__LITTLE_ENDIAN)
> +#if defined(CFG_FLASH_CFI_SWAP)
> 
> Why use CFG_FLASH_CFI_SWAP instead of __LITTLE_ENDIAN.  It seems that
they are
> equivalent.
> 
> Best Regards,
> Leo
> > -----Original Message-----
> > From: u-boot-users-bounces at lists.sourceforge.net
> > [mailto:u-boot-users-bounces at lists.sourceforge.net] On Behalf Of
Yuli Barcohen
> > Sent: Tuesday, August 08, 2006 7:00 PM
> > To: u-boot-users at lists.sourceforge.net
> > Cc: Sam Song; Wolfgang Denk
> > Subject: Re: [U-Boot-Users] [RFC] CFI Driver Little-Endian write
Issue
> >
> > >>>>> Sam Song writes:
> >
> >     Zang> Where is the patch?  I do not object.  Our final goal is
to
> >     Zang> enable the general flash driver work on the board.
> >
> >     Sam> Sorry, I misused the word patch:-). The "patch" is Yuli's
> >     Sam> cfi_flash.c in his attached file. See your mail archive. It
> >     Sam> would be there. I tested that it was OK but still need your
> >     Sam> confirmation, I am afraid.
> >
> > OK, the patch is attached. As we know, it works on big-endian
systems.
> > On little-endian ones, it should change nothing.
> >
> > --
> >
========================================================================
> >  Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project
Leader
> >  yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software,
Israel
> >
========================================================================

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Yuli Barcohen]

>>>>> Li Yang writes:

    Li> Please ignore my last question.  Lately, I find out in your .c
    Li> file that there are still some places using __LITTLE_ENDIAN.

    Li> However, I still have a question that in which condition
    Li> CFG_FLASH_CFI_SWAP is required to set?

As I mentioned, it's for byte lanes swapping. If you connect a 16-bit
flash chip to a PPC, you need to connect only two byte lanes of the PPC
data bus i.e. lines D0-D15. For PPC, D0 is MSB and D15 is LSB. For the
flash, D0 is LSB and D15 is MSB. So, you can connect D0 to D15, D1 to
D14, and so on. Another possibility D0-D7 of PPC to D7-D0 of the flash
and D8-D15 of PPC to D15-D8 of the flash. The latter case is the case of
swapped byte lanes because PPC's most significant byte goes always to
D0-D7 and thus to the least significant byte of the flash. So, in the
latter case, you have to define CFG_FLASH_CFI_SWAP. Without
CFG_FLASH_CFI_SWAP, any flash command (which is always single byte) will
go to PPC's D8-D15 and consequently to the most significant byte of the
flash. This won't work because the commands must go to the flash's least
significant byte. Of course, PPC is only an example, the same problem
can occur with other CPUs too, it only depends on the bus architecture.

-- 
========================================================================
 Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project Leader
 yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software, Israel
========================================================================

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Tolunay Orkun]

Yuli Barcohen wrote:

> As I mentioned, it's for byte lanes swapping. If you connect a 16-bit
> flash chip to a PPC, you need to connect only two byte lanes of the PPC
> data bus i.e. lines D0-D15. For PPC, D0 is MSB and D15 is LSB. For the
> flash, D0 is LSB and D15 is MSB. So, you can connect D0 to D15, D1 to
> D14, and so on. 

This is the correct way of interfacing flash chip per PowerPC documentation.

> Another possibility D0-D7 of PPC to D7-D0 of the flash and D8-D15 of PPC
> to D15-D8 of the flash. The latter case is the case of swapped byte lanes
> because PPC's most significant byte goes always to D0-D7 and thus to the 
> least significant byte of the flash. 

This is really not the correct way to interface the Flash. It seems like 
hardware designer goofed up and asking the software guys to fix his/her 
mess.

> So, in the latter case, you have to define CFG_FLASH_CFI_SWAP. Without
> CFG_FLASH_CFI_SWAP, any flash command (which is always single byte) will
> go to PPC's D8-D15 and consequently to the most significant byte of the
> flash. This won't work because the commands must go to the flash's least
> significant byte. Of course, PPC is only an example, the same problem
> can occur with other CPUs too, it only depends on the bus architecture.

Really it depends on the designer. The hardware designer can scramble 
the data bus in many more ways.

Best regards,
Tolunay

[U-Boot-Users] [RFC] CFI Driver Little-Endian write Issue

[Yuli Barcohen]

>>>>> Tolunay Orkun writes:

    Yuli> As I mentioned, it's for byte lanes swapping. If you connect a
    Yuli> 16-bit flash chip to a PPC, you need to connect only two byte
    Yuli> lanes of the PPC data bus i.e. lines D0-D15. For PPC, D0 is
    Yuli> MSB and D15 is LSB. For the flash, D0 is LSB and D15 is
    Yuli> MSB. So, you can connect D0 to D15, D1 to D14, and so on.

    Tolunay> This is the correct way of interfacing flash chip per
    Tolunay> PowerPC documentation.

In most cases, yes, though there is no single "correct" way.

    Yuli> Another possibility D0-D7 of PPC to D7-D0 of the flash and
    Yuli> D8-D15 of PPC to D15-D8 of the flash. The latter case is the
    Yuli> case of swapped byte lanes because PPC's most significant byte
    Yuli> goes always to D0-D7 and thus to the least significant byte of
    Yuli> the flash.

    Tolunay> This is really not the correct way to interface the
    Tolunay> Flash. It seems like hardware designer goofed up and asking
    Tolunay> the software guys to fix his/her mess.

It depends. In most cases, it's a designer's mistake. However, I saw it
on roughly half of all boards I worked with so probably it can be
declared a "feature." Linux MTD includes support for it. In some cases,
it's not a mistake but the only way to connect the flash. For example,
there are many flash chips which can work in both 8-bit and 16-bit
modes. If you want to have both options on your board (probably, you're
building an evaluation board or reference design), you have to swap the
byte lanes if you want to preserve glueless PPC-flash interface.

    Yuli> So, in the latter case, you have to define
    Yuli> CFG_FLASH_CFI_SWAP. Without CFG_FLASH_CFI_SWAP, any flash
    Yuli> command (which is always single byte) will go to PPC's D8-D15
    Yuli> and consequently to the most significant byte of the
    Yuli> flash. This won't work because the commands must go to the
    Yuli> flash's least significant byte. Of course, PPC is only an
    Yuli> example, the same problem can occur with other CPUs too, it
    Yuli> only depends on the bus architecture.

    Tolunay> Really it depends on the designer. The hardware designer
    Tolunay> can scramble the data bus in many more ways.

Because of this, I think that using #ifdef __LITTLE_ENDIAN is not a good
idea but I preserved the existing algorithm because I have no
little-endian systems to test possible changes.

-- 
========================================================================
 Yuli Barcohen       | Phone +972-9-765-1788 |  Software Project Leader
 yuli at arabellasw.com | Fax   +972-9-765-7494 | Arabella Software, Israel
========================================================================