[U-Boot-Users] [PATCH] Add support for Amstrad Delta (E3).

Jonathan McDowell
2006-06-13T16:59:27Z

The attached patch adds support for the Amstrad Delta (E3) Videophone.
Currently the Amstrad primary bootloader provides the main hardware
initialisation and then loads u-boot to handle user interaction and
kernel loading.

I'd appreciate any comments you may have. Patch is against current git.

J.

--
noodles is realistic with a few teen issues
This .sig brought to you by the letter Y and the number 42
Product of the Republic of HuggieTag
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diff --git a/Makefile b/Makefile
index 440ab2c..659e9b1 100644
--- a/Makefile
+++ b/Makefile
@@ -1565,6 +1565,9 @@ netstar_config: unconfig
omap1510inn_config : unconfig
@./mkconfig $(@:_config=) arm arm925t omap1510inn

+amsdelta_config : unconfig
+ @./mkconfig $(@:_config=) arm arm925t amsdelta
+
omap5912osk_config : unconfig
@./mkconfig $(@:_config=) arm arm926ejs omap5912osk NULL omap

diff --git a/board/amsdelta/Makefile b/board/amsdelta/Makefile
new file mode 100644
index 0000000..4b16cfd
--- /dev/null
+++ b/board/amsdelta/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2006 Jonathan McDowell <noodles@earth.li>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := amsdelta.o amsdelta-nand.o
+
+$(LIB): $(OBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/amsdelta/amsdelta-nand.c b/board/amsdelta/amsdelta-nand.c
new file mode 100644
index 0000000..a8133d2
--- /dev/null
+++ b/board/amsdelta/amsdelta-nand.c
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+
+#include <arm925t.h>
+#include <asm/errno.h>
+#include <configs/omap1510.h>
+#include <nand.h>
+
+#define AMSDELTA_LATCH2_NAND_NCE 0x0004
+#define AMSDELTA_LATCH2_NAND_NRE 0x0008
+#define AMSDELTA_LATCH2_NAND_NWP 0x0010
+#define AMSDELTA_LATCH2_NAND_NWE 0x0020
+#define AMSDELTA_LATCH2_NAND_ALE 0x0040
+#define AMSDELTA_LATCH2_NAND_CLE 0x0080
+#define AMSDELTA_NAND_RB (1 << 12)
+
+static u16 amsdelta_latch2_val = 0;
+
+static void amsdelta_latch2_write(u16 mask, u16 value)
+{
+ amsdelta_latch2_val &= ~mask;
+ amsdelta_latch2_val |= value;
+ *(volatile u16 *) 0x08000000 = amsdelta_latch2_val;
+}
+
+static void amsdelta_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_CLE,
+ AMSDELTA_LATCH2_NAND_CLE);
+ break;
+ case NAND_CTL_CLRCLE:
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_CLE, 0);
+ break;
+ case NAND_CTL_SETALE:
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_ALE,
+ AMSDELTA_LATCH2_NAND_ALE);
+ break;
+ case NAND_CTL_CLRALE:
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_ALE, 0);
+ break;
+ case NAND_CTL_SETNCE:
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_NCE, 0);
+ break;
+ case NAND_CTL_CLRNCE:
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_NCE,
+ AMSDELTA_LATCH2_NAND_NCE);
+ break;
+ }
+}
+
+static int amsdelta_dev_ready(struct mtd_info *mtdinfo)
+{
+ u32 i;
+
+ gpiosetdir(AMSDELTA_NAND_RB, AMSDELTA_NAND_RB);
+ i = *(volatile u32 *) GPIO_DATA_INPUT_REG;
+
+ return ((i & AMSDELTA_NAND_RB) == AMSDELTA_NAND_RB);
+}
+
+static u_char amsdelta_read_byte(struct mtd_info *mtd)
+{
+ u_char val;
+
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_NRE, 0);
+ *(volatile u8 *) MPUIO_DIR_CONTROL_REG = ~0;
+ udelay(1);
+ val = *(volatile u8 *) MPUIO_DATA_INPUT_REG;
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_NRE,
+ AMSDELTA_LATCH2_NAND_NRE);
+
+ return val;
+}
+
+static void amsdelta_write_byte(struct mtd_info *mtd, u_char byte)
+{
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_NWE, 0);
+ *(volatile u8 *) MPUIO_DIR_CONTROL_REG = 0;
+ udelay(1);
+ *(volatile u8 *) MPUIO_DATA_OUTPUT_REG = byte;
+ amsdelta_latch2_write(AMSDELTA_LATCH2_NAND_NWE,
+ AMSDELTA_LATCH2_NAND_NWE);
+}
+
+static void amsdelta_write_buf(struct mtd_info *mtd, const u_char *buf,
+ int len)
+{
+ int i;
+
+ for (i=0; i<len; i++)
+ amsdelta_write_byte(mtd, buf[i]);
+}
+
+static void amsdelta_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+ int i;
+
+ for (i=0; i<len; i++)
+ buf[i] = amsdelta_read_byte(mtd);
+}
+
+static int amsdelta_verify_buf(struct mtd_info *mtd, const u_char *buf,
+ int len)
+{
+ int i;
+
+ for (i=0; i<len; i++)
+ if (buf[i] != amsdelta_read_byte(mtd))
+ return -EFAULT;
+
+ return 0;
+}
+
+/*
+ * Our board specific NAND initialisation.
+ */
+void board_nand_init(struct nand_chip *nand)
+{
+ amsdelta_latch2_write(~0, AMSDELTA_LATCH2_NAND_NRE |
+ AMSDELTA_LATCH2_NAND_NWE | AMSDELTA_LATCH2_NAND_NCE);
+
+ nand->hwcontrol = amsdelta_hwcontrol;
+ nand->dev_ready = amsdelta_dev_ready;
+
+ nand->read_byte = amsdelta_read_byte;
+ nand->write_byte = amsdelta_write_byte;
+ nand->read_buf = amsdelta_read_buf;
+ nand->write_buf = amsdelta_write_buf;
+ nand->verify_buf = amsdelta_verify_buf;
+
+ nand->eccmode = NAND_ECC_SOFT;
+ nand->chip_delay = 12;
+}
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
diff --git a/board/amsdelta/amsdelta.c b/board/amsdelta/amsdelta.c
new file mode 100644
index 0000000..532af8c
--- /dev/null
+++ b/board/amsdelta/amsdelta.c
@@ -0,0 +1,85 @@
+/*
+ * Based on board/omap5912osk/omap5912osk.c
+ *
+ * Copyright (C) 2006 Mark Underwood <basicmark@yahoo.com>
+ * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <configs/omap1510.h>
+
+static inline void delay (unsigned long loops)
+{
+ __asm__ volatile ("1:\n"
+ "subs %0, %1, #1\n"
+ "bne 1b":"=r" (loops):"0" (loops));
+}
+
+/*
+ * Miscellaneous platform dependent initialisations.
+ *
+ * Very little to do here as PBL has already done it for us.
+ */
+int board_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ /*
+ * MACH_AMS_DELTA is 862 for a 2.6 kernel.
+ */
+ gd->bd->bi_arch_number = 862;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0x10000100;
+
+ /*
+ * this speeds up your boot a quite a bit. However to make it
+ * work, you need make sure your kernel startup flush bug is fixed.
+ * ... rkw ...
+ */
+ icache_enable ();
+
+ return 0;
+}
+
+/* For now we have no flash! */
+unsigned long flash_init (void)
+{
+ return 0;
+}
+
+/* PBL as done all the lowlevel init */
+void lowlevel_init (void)
+{
+ /* Light the email LED */
+ *(volatile u8 *) 0x01000000 = 4;
+}
+
+/******************************
+ Routine:
+ Description:
+******************************/
+int dram_init (void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
diff --git a/board/amsdelta/config.mk b/board/amsdelta/config.mk
new file mode 100644
index 0000000..9998cdd
--- /dev/null
+++ b/board/amsdelta/config.mk
@@ -0,0 +1,20 @@
+#
+# Amstrad E3 (Delta) Videophone
+#
+# http://www.amstrad.com/products/emailers/e3.html
+# http://www.earth.li/~noodles/hardware-e3.html
+#
+# 1 bank of 32MB SDRAM
+# Physical Address:
+# 1000'0000 to 2000'0000
+#
+# Linux-Kernel is expected to be at 1000'8000, entry 1000'8000
+# (mem base + reserved)
+#
+# we load ourself to 11f00000
+#
+TEXT_BASE = 0x11f00000
+#
+# We want NAND support.
+#
+BOARDLIBS = drivers/nand/libnand.a
diff --git a/board/amsdelta/u-boot.lds b/board/amsdelta/u-boot.lds
new file mode 100644
index 0000000..f35a3ab
--- /dev/null
+++ b/board/amsdelta/u-boot.lds
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm925t/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/cpu/arm925t/start.S b/cpu/arm925t/start.S
index acd7742..c2c2adb 100644
--- a/cpu/arm925t/start.S
+++ b/cpu/arm925t/start.S
@@ -125,6 +125,7 @@ reset:
orr r0,r0,#0xd3
msr cpsr,r0

+#ifndef CONFIG_AMSDELTA
/*
* Set up 925T mode
*/
@@ -159,6 +160,7 @@ poll1:
ldrh r1, [r0]
ands r1, r1, #0x01
beq poll1
+#endif

/*
* we do sys-critical inits only at reboot,
diff --git a/include/configs/amsdelta.h b/include/configs/amsdelta.h
new file mode 100644
index 0000000..180bf84
--- /dev/null
+++ b/include/configs/amsdelta.h
@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2006 Mark Underwood <basicmark@yahoo.com>
+ * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li>
+ *
+ * Configuation settings for the Amstrad E3 videophone (codename Delta)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM925T 1 /* This is an arm925t CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP1510 1 /* 5910 is sort of a 1510 */
+#define CONFIG_AMSDELTA 1 /* An Amstrad Delta (E3) */
+
+/* input clock of PLL */
+/* the not sure what the E3 sys clock is. Do we need to know? */
+#define CONFIG_SYS_CLK_FREQ 12000000
+
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * NS16550 Configuration
+ */
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK 12000000 /* can be 12M/32Khz or 48Mhz */
+#define CFG_NS16550_COM1 0xfffb0000 /* UART1, the EXP port */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+//((CONFIG_CMD_DFL & (~CFG_CMD_IMLS))UL) /* Default config - IMLS*/
+
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & \
+ ~(CFG_CMD_NET | CFG_CMD_FPGA | \
+ CFG_CMD_NFS | CFG_CMD_FLASH | \
+ CFG_CMD_ENV | CFG_CMD_IMLS)) | \
+ CFG_CMD_ASKENV | CFG_CMD_NAND | \
+ CFG_CMD_JFFS2)
+
+#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+#define CFG_HUSH_PARSER 1
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+#include <configs/omap1510.h>
+
+#define CONFIG_BOOTDELAY 30
+#define CONFIG_BOOTARGS "mem=32M console=tty0 console=ttyS0,115200n8 root=/dev/mtdblock4 rootfstype=jffs2"
+#define CONFIG_BOOTCOMMAND "nboot 11d00000 0 ; bootm 11d00000"
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "E3 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+/* Print Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
+#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x10000000 /* default load address */
+
+/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
+ * DPLL1. This time is further subdivided by a local divisor.
+ */
+#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
+#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
+#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
+
+#define CFG_NO_FLASH
+
+/*
+ * NAND config.
+ */
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1
+#define CFG_NAND_BASE 0x80000000
+
+/*
+ * Environment in mtd2 on NAND.
+ */
+#define CFG_ENV_IS_IN_NAND
+#define CFG_ENV_SIZE 0x40000 /* Total size of environment */
+#define CFG_ENV_OFFSET 0x003C0000 /* 3.75M into flash */
+
+/*
+ * JFFS2 (mtd4) config.
+ */
+#define CONFIG_JFFS2_NAND
+#define CONFIG_JFFS2_DEV "nand0"
+#define CONFIG_JFFS2_PART_OFFSET 0x00440000 /* 4.25M into flash */
+#define CONFIG_JFFS2_PART_SIZE (27*1024*1024)
+
+#endif /* __CONFIG_H */